SLVSM33 September   2026 TPS7H6200-SEP

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VIN PVIN
      2. 8.3.2  Bootstrap Operation
      3. 8.3.3  Voltage Reference
      4. 8.3.4  Enable
      5. 8.3.5  Start-Up and UVLO
      6. 8.3.6  Programmable Dead-Time
      7. 8.3.7  Current Sense
      8. 8.3.8  Over Temperature Protection (TSD)
      9. 8.3.9  Fault Reporting (FLTB)
      10. 8.3.10 PWM
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Enable Configuration
        2. 9.2.2.2 Dead Time Setting
        3. 9.2.2.3 FLTB / Controller Connection
        4. 9.2.2.4 Configuring Current Sense
          1. 9.2.2.4.1 Current Sense Accuracy
        5. 9.2.2.5 FET Thermal Impedance
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1.     54

8.3.2 Bootstrap Operation

To generate the power for the high-side gate driver circuitry the TPS7H6200-SEP incorporates an internal gate-to-source tied GaN FET to use the 3rd quadrant operation of the GaN FET as a bootstrap diode. TI recommends a ceramic 16V (minimum voltage rating) 100nF capacitor for CBOOT.