SLVUD28 March   2025 TPS7H5020-SEP , TPS7H5020-SP

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 EVM Connections and Test Points
    2. 2.2 Best Practices
  8. 3Implementation Results
    1. 3.1 Evaluation Setup
    2. 3.2 Startup
    3. 3.3 Shutdown
    4. 3.4 Output Voltage Ripple
    5. 3.5 Load Step
    6. 3.6 Frequency Response
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Compliance Information
  11. 6Additional Information
    1. 6.1 Trademarks
  12. 7Related Documentation

1.3 Specification

TPS7H5020EVM Simplified Schematic Figure 1-1 Simplified Schematic

Table 1-1 Default Configuration Options
ParameterSpecificationDescription

Input voltage

VIN

5V to 12VWithin device input voltage range of 4.5V to 14V.

Output

VOUT

15V at 1ACommon power rail voltage within the device output capability. Configured by R18.

PVIN connection

PVIN

PVIN connected to VLDOConfigurable to connect PVIN to VIN by populating R2 with 0Ω resistor and depopulating R3.

EN connection

EN

EN connected to VLDOConfigurable to connect EN to VIN for UVLO by depopulating R4 and populating R5 and R6.