SLVUDA9 October   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 I/O Information
    2. 2.2 Jumper Information
    3. 2.3 Equipment
    4. 2.4 Hardware Setup
  9. 3Software
    1. 3.1 Software Setup
    2. 3.2 Test Procedure
      1. 3.2.1 Initial Power Up
      2. 3.2.2 I2C Register Communication Verification
      3. 3.2.3 Forward/Charge/Sink Mode Verification
      4. 3.2.4 Reverse/OTG/Source Mode Verification
      5. 3.2.5 Helpful Tips
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
      1. 4.2.1 PCB Layout Guidelines
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1.     Trademarks
  12. 6Revision History

2.1 I/O Information

Table 2-1 lists the input and output connections available on this EVM and their respective descriptions.

Table 2-1 EVM I/O Connections
Jack Description
J1(1) - SYS Positive rail of the charger system output voltage, typically connected to the system load
J1(2) - GND Ground
J2(1) - VPWR Positive rail of the charger input voltage
J2(2) - GND Ground
J3(1) - BAT+ Positive rail of the charger battery input, connected to the positive terminal of the external battery
J3(2) -

TS

 Connection available for external thermistor if required
J3(3) - GND Ground
J4 For test purposes only - do not use. IC pin voltages are at the different vias of this uninstalled header.
J5 Power connection to TPS2575x EVM
J6 I2C connector for the EV2400 or EV2500 interface board
J7 I2C connector for the USB2ANY interface board - potential future use
J8 8 pin header data connection to TPS2575x