SLVUDW7 May   2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Setup
    3. 2.3 Header Information
    4. 2.4 Jumper Information
    5. 2.5 Test Points
  9. 3Software
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1.     Trademarks
  12. 6Related Documentation

2.4 Jumper Information

Table 2-2 describes the six jumpers present on the AFE88XH1-FELC-EVM evaluation module.

Table 2-2 Jumper Description
Jumper Designator Description
J3

AFE88XH1 VREF voltage selection

Open (Default): Leave the jumper open when AFE88XH1 internal reference is used.

Pins 1-2: 1.25V from REF35125 for external reference

Pins 2-3: External reference from MCU board
J4

1.8V LDO power supply enable

Open: Disabled

Short: Enabled
J5 External 1.8V LDO input for AFE881H1 internal bias when PVDD < 2.7V. Leave open when 2.7V < PVDD < 5.5V
J6

Voltage selection for silicon-controlled rectifier (SCR) circuit to supply IOVDD.

Pins 1-3: IOVDD supplied by 3.3V transistor connection.

Pins 3-5: IOVDD supplied by 1.8V transistor connection.

Pins 2-4: 3.3V input power to SCR transistor Q3

Pins 4-6: 1.8V input power to SCR transistor Q6
J7

AFE88XH1 internal reference enable.

Open: Internal reference disabled

Short: Internal reference enabled
J8

Transmission loop impedance adjustment

Open: AFE882H1 default

Short: AFE881H1 default