SNAA433 March   2025 CDC6C

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2BAW Overview
    1. 2.1 BAW Structure Overview
    2. 2.2 BAW Oscillator Advantages
  6. 3IEEE 100Mbps Requirements
    1. 3.1 Test Summary on Channel A
  7. 4CDC6C Clocking DP83822 Evaluation
  8. 5Clocking for Different Ethernet PHY
  9. 6Summary
  10. 7References

Introduction

The CDC6C is a low power, LVCMOS, BAW oscillator with integrated integer divider to support large frequency output range anywhere from 1MHz to 200MHz. Each frequency is programmed using one-time-programmable memory or OTP for short. CDC6C can also support Vdd input from 1.8V-3.3V using a single supply rail allowing for numerous different configurations using a single IC. For more details on CDC6C capabilities view CDC6Cx Low Power LVCMOS Output BAW Oscillator. For the purposes of this evaluation a 25MHz CDC6C is used - CDC6CE025000ADLFR.

This document contains a summary of the test set up and measured results highlighting advantages to the Ethernet PHY’s data packet transmission. CDC6C is tested under the specifications highlighted in IEEE 802.3 and IOL’s (InterOperability Laboratory) interoperability test bed to determine advantages for 100Base-Tx devices, DP83822 in this case.