SNAS818C July   2021  – August 2025 CDCDB800

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fail-Safe Input
      2. 7.3.2 Output Enable Control
      3. 7.3.3 SMBus
        1. 7.3.3.1 SMBus Address Assignment
    4. 7.4 Device Functional Modes
      1. 7.4.1 CKPWRGD_PD# Function
      2. 7.4.2 OE[7:0]# and SMBus Output Enables
      3. 7.4.3 Output Slew Rate Control
      4. 7.4.4 Output Impedance Control
    5. 7.5 Programming
  9. Register Maps
    1. 8.1 CDCDB800 Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Enable Control Method
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 TICS Pro
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Revision History

Changes from Revision B (May 2022) to Revision C (August 2025)

  • Added PCIe Gen 7 specifications in the Features, Applications, and Description sectionsGo
  • Added PCIe Gen 7 specifications in the Overview section Go

Changes from Revision A (September 2021) to Revision B (May 2022)

  • Changed the data sheet titleGo
  • Added PCIe Gen 6 to the data sheetGo
  • Changed the pin description for pin 46 Go

Changes from Revision * (July 2021) to Revision A (September 2021)

  • Changed pin descriptions for pins 47 and 48Go
  • Changed Absolute Maximum Ratings note 1.Go
  • Changed the SPI terminology for the generic programming sequence and protocol figures Go
  • Changed the reset values and description for the Register Field Description tables.Go