SNLU334 December 2023 DS320PR410
Each DS320PR410 deploys an RX Detect state machine that governs the RX detection cycle as defined in the PCI Express specification. At power up or after a manually triggered event, the redriver determines whether or not a valid PCI Express termination is present at the far end of the link. When the DS320PR410 is in Pin Mode (MODE = L0), the RX_DET pin of DS320PR410 provides additional flexibility to system designers to appropriately set the device in their desired mode, according to Table 3-5.
PD PIN LEVEL | RX_DET PIN LEVEL | DS320PR410 Channel RX Common-mode Impedance | DESCRIPTION |
---|---|---|---|
L | L0 | Always 50 Ω | PCI Express RX detection state machine is disabled. Recommended for non-PCI Express use cases. |
L | L1 | Pre Detect: Hi-Z Post Detect: 50 Ω |
Outputs poll until 3 consecutive valid detections. |
L | L2 | Pre Detect: Hi-Z Post Detect: 50 Ω |
Outputs poll until 2 consecutive valid detections. |
L | L3 | N/A | Reserved |
L | L4 (Float) | Pre Detect: Hi-Z Post Detect: 50 Ω |
TX polls approx. every 150 μs until valid termination is detected. Rx CM impedance held at Hi-Z until detection. Reset by asserting PD high for 200 μs then low. |
H | X | Hi-Z | Reset all DS320PR410 channels signal path and set their Rx impedance state to Hi-Z. |
The RX Detect state of each channel of each device can also be set by writing to SMBus / I2C registers in Secondary or Primary Modes. Refer to the DS320PR410 Programming Guide for details.