SNOS773P March   2000  – February 2025 LP2981-N

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
        1. 6.3.3.1 Current Limit (Legacy Chip)
        2. 6.3.3.2 Current Limit (New Chip)
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Thermal Shutdown
      6. 6.3.6 Output Pulldown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
        1. 7.1.1.1 Recommended Capacitors (Legacy Chip)
          1. 7.1.1.1.1 Tantalum Capacitors
          2. 7.1.1.1.2 Ceramic Capacitors
          3. 7.1.1.1.3 Aluminum Capacitors
        2. 7.1.1.2 Recommended Capacitors (New Chip)
      2. 7.1.2 Input and Output Capacitor Requirements
        1. 7.1.2.1 Input Capacitor
        2. 7.1.2.2 Output Capacitor
      3. 7.1.3 Estimating Junction Temperature
      4. 7.1.4 Power Dissipation (PD)
      5. 7.1.5 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON and OFF Input Operation
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Nomenclature
    2. 8.2 Third-Party Products Disclaimer
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Related Documentation
    5. 8.5 Support Resources
    6. 8.6 Trademarks
    7. 8.7 Electrostatic Discharge Caution
    8. 8.8 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

LP2981-N DBV Package,5-Pin SOT-23(Top View) Figure 4-1 DBV Package,5-Pin SOT-23(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NO. NAME
1 IN I Input supply pin. Use a capacitor with a value of 1µF or larger from this pin to ground. See the Input and Output Capacitor Requirements section for more information.
2 GND — Common ground (device substrate).
3 ON/OFF I Enable pin for the LDO. Driving the ON/OFF pin high enables the device. Driving this pin low disables the device. High and low thresholds are listed in the Electrical Characteristics table. Tie this pin to VIN if unused.
4 NC —

DO NOT CONNECT. Device pin 4 is reserved for post packaging test and calibration of the LP2981-N VOUT accuracy. Device pin 4 must be left floating. Do not connect to any potential. Do not connect to ground. Any attempt to do pin continuity testing on device pin 4 is discouraged. Continuity test results are variable depending on the actions of the factory calibration. Aggressive pin continuity testing (high voltage, or high current) on device pin 4 can activate the trim circuitry forcing VOUT to move out of tolerance.
5 OUT(1) O Output of the regulator. Use a capacitor with a value of 2.2µF or larger from this pin to ground. See the Input and Output Capacitor Requirements section for more information.
(1) The nominal output capacitance must be greater than 1μF. Throughout this document, the nominal derating on these capacitors is 50%. Make sure that the effective capacitance at the pin is greater than 1μF.