SNOS773P
March 2000 – February 2025
LP2981-N
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Output Enable
6.3.2
Dropout Voltage
6.3.3
Current Limit
6.3.3.1
Current Limit (Legacy Chip)
6.3.3.2
Current Limit (New Chip)
6.3.4
Undervoltage Lockout (UVLO)
6.3.5
Thermal Shutdown
6.3.6
Output Pulldown
6.4
Device Functional Modes
6.4.1
Normal Operation
6.4.2
Dropout Operation
6.4.3
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Recommended Capacitor Types
7.1.1.1
Recommended Capacitors (Legacy Chip)
7.1.1.1.1
Tantalum Capacitors
7.1.1.1.2
Ceramic Capacitors
7.1.1.1.3
Aluminum Capacitors
7.1.1.2
Recommended Capacitors (New Chip)
7.1.2
Input and Output Capacitor Requirements
7.1.2.1
Input Capacitor
7.1.2.2
Output Capacitor
7.1.3
Estimating Junction Temperature
7.1.4
Power Dissipation (PD)
7.1.5
Reverse Current
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
ON and OFF Input Operation
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Nomenclature
8.2
Third-Party Products Disclaimer
8.3
Receiving Notification of Documentation Updates
8.4
Related Documentation
8.5
Support Resources
8.6
Trademarks
8.7
Electrostatic Discharge Caution
8.8
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
1
Features
Input voltage (V
IN
) range:
Legacy chip: 2.1V to 16V
New chip: 2.5V to 16V
Output voltage (V
OUT
) range: 1.2V to 5.0V
Output voltage (V
OUT
) accuracy:
±0.75% for A-grade legacy chip
±1.25% for standard-grade legacy chip
±0.5% for new chip (A-grade and standard grade)
Output voltage (V
OUT
) accuracy over load and temperature: ±1% (new chip)
Output current: Up to 100mA
Low I
Q
(new chip): 69μA at I
LOAD
= 0mA
Low I
Q
(new chip): 620μA at I
LOAD
= 100mA
Shutdown current over temperature:
< 1μA (legacy chip)
≤ 1.75μA (new chip)
Output current limiting and thermal protection
Stable with 2.2µF ceramic capacitors (new chip)
High PSRR (new chip):
75dB at 1kHz, 45dB at 1MHz
Operating junction temperature: –40°C to +125°C
Package: 5-pin SOT-23 (DBV)