SNOSDI8A May   2024  – November 2025 LMG2650

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 GaN Power FET Switching Parameters
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  GaN Power FET Switching Capability
      2. 7.3.2  Turn-On Slew-Rate Control
      3. 7.3.3  Current-Sense Emulation
      4. 7.3.4  Bootstrap Diode Function
      5. 7.3.5  Input Control Pins (EN, INL, INH, GDH)
      6. 7.3.6  INL - INH Interlock
      7. 7.3.7  AUX Supply Pin
        1. 7.3.7.1 AUX Power-On Reset
        2. 7.3.7.2 AUX Under-Voltage Lockout (UVLO)
      8. 7.3.8  BST Supply Pin
        1. 7.3.8.1 BST Power-On Reset
        2. 7.3.8.2 BST Under-Voltage Lockout (UVLO)
      9. 7.3.9  Overcurrent Protection
      10. 7.3.10 Overtemperature Protection
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 LLC Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 AHB Application
      3. 8.2.3 Motor Drives Application
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Solder-Joint Stress Relief
        2. 8.4.1.2 Signal-Ground Connection
        3. 8.4.1.3 CS Pin Signal
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

3 Description

The LMG2650 is a 650V 95mΩ GaN power-FET half bridge. The LMG2650 simplifies design, reduces component count, and reduces board space by integrating half-bridge power FETs, gate drivers, bootstrap FET, and high-side gate-drive level shifter in a 6mm × 8mm QFN package.

Programmable turn-on slew rates provide EMI and ringing control. The low-side current-sense emulation reduces power dissipation compared to the traditional current-sense resistor and allows the low-side thermal pad to connect to PCB power ground.

Control the high-side GaN power FET with either the low-side referenced gate-drive pin (INH) or the high-side referenced gate-drive pin (GDH). The high-side gate-drive signal level shifter reliably transmits the INH pin signal to the high-side gate driver in challenging power switching environments. The smart-switched GaN bootstrap FET has no diode forward-voltage drop, avoids overcharging the high-side supply, and has zero reverse-recovery charge.

The LMG2650 supports converter light-load efficiency requirements and burst-mode operation with low quiescent currents and fast start-up times. Protection features include FET turn-on interlock, under-voltage lockout (UVLO), cycle-by-cycle current limit, and over-temperature shut down. Ultra low slew rate setting supports motor drive applications.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
LMG2650RFB (VQFN, 19)6.00mm × 8.00mm
(1) For more information, see Section 11.
(2) The package size (width × length) is a nominal value and includes pins, where applicable.
LMG2650 Package View Package View