SNOU173A October   2020  – December 2020 LM7310

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 EVM Features
    2. 1.2 EVM Applications
  3. 2Description
  4. 3Schematic
  5. 4General Configurations
    1. 4.1 Physical Access
    2. 4.2 Test Equipment and Set up
      1. 4.2.1 POWER SUPPLIES
      2. 4.2.2 METERS
      3. 4.2.3 OSCILLOSCOPE
      4. 4.2.4 LOADS
  6. 5Test Setup and Procedures
    1. 5.1 Startup Test
    2. 5.2 ORing of Two Power Supplies Test
    3. 5.3 Reverse Current Blocking Test
    4. 5.4 Output Short-Circuit Test
    5. 5.5 Input Reverse Polarity Test
  7. 6EVAL Board Assembly Drawings and Layout Guidelines
    1. 6.1 PCB Drawings
  8. 7Bill Of Materials (BoM)
  9. 8Revision History

4.1 Physical Access

Table 4-1 lists the LM73100EVM Ideal Diode Evaluation Board input and output connector functionality. Table 4-2 and Table 4-3 describe the test point availability and the jumper functionality.

Table 4-1 Input and Output Connector Functionality

Channel

ConnectorLabelDescription

CH1

J5VIN1(+), GND(–) Input of CH1
J1VOUT1(+), GND(–)Output of CH1

CH2

J10VIN2(+), GND(–) Input of CH2
J7VOUT2(+), GND(–)Output of CH2
Table 4-2 Test Points Description

Channel

Test PointsLabelDescription

CH1

TP12VIN1CH1 Input voltage
TP7VOUT1CH1 Output voltage
TP11EN/UVLO1CH1 EN/UVLO signal
TP4OVLO1CH1 OVLO signal
TP2

dVdt1

CH1 Output voltage ramp control
TP3IMON1CH1 Load current monitor
TP10PG1CH1 Power good signal
TP8PGTH1CH1 Power good threshold signal
TP5GND1IC GND of U1

CH2

TP24VIN2CH2 Input voltage
TP19VOUT2CH2 Output voltage
TP23EN/UVLO2CH2 EN/UVLO signal
TP17OVLO2CH2 OVLO signal
TP14dVdt2CH2 Output voltage ramp control
TP16IMON2CH2 Load current monitor
TP22PG2CH2 Power good signal
TP20PGTH2CH2 Power good threshold signal
TP15GND2IC GND of U2

TP6, TP1,TP13, TP18

PGND

Common Power GND for both channels

Table 4-3 Jumpers Description and Default Position

Channel

JumperLabelDescription

Default Jumper Position

CH1

J2

dVdt1

1-2 Position sets Output Slew Rate to 0.6 mV/us

3-4

3-4 Position sets Output Slew Rate to 0.2 mV/us
5-6 Position sets Output Slew Rate to 0.09 mV/us

J3

IMON1

1-2 Position sets RIMON = 150 Ω (IMON function disabled)

3-4

5-6

3-4 Position sets RIMON = 1.15 kΩ
5-6 Position connects a low voltage clamping diode

J4

OVLO1

1-2 Position sets input

OVLO threshold at 3.78 V

5-6

3-4 Position sets input

OVLO threshold at 5.7V

5-6 Position sets input

OVLO threshold at 13.8V

J8

VCC Connection Ch-1

1-2 Position connects external voltage, VCC_EXT1 as reference for PG1

2-3

2-3 Position connects on board generated voltage , VCC as reference for PG1

CH2

J9

EN/UVLO2

1-2 Position connects EN/UVLO2 with PG1. Use this setting for parallel operation of U1 and U2

2-3

2-3 Position sets the EN/UVLO2 threshold at 10.8V

J11

VCC Connection Ch-2

1-2 Position connects external voltage, VCC_EXT2 as reference for PG2

2-3

2-3 Position connects on board generated voltage , VCC as reference for PG2
Table 4-4 LED Description
LEDDescription

D6

When ON, indicates that PG1 is asserted for Channel-1

D11

When ON, indicates that PG2 is asserted for Channel-2