SNVSC52A December   2021  – October 2026 LP5864

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7.     14
    8. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Time-Multiplexing Matrix
      2. 7.3.2 Analog Dimming (Current Gain Control)
      3. 7.3.3 PWM Dimming
      4. 7.3.4 ON and OFF Control
      5. 7.3.5 Data Refresh Mode
      6. 7.3.6 Full Addressable SRAM
      7. 7.3.7 Protections and Diagnostics
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Interface Selection
      2. 7.5.2 I2C Interface
        1. 7.5.2.1 I2C Data Transactions
        2. 7.5.2.2 I2C Data Format
        3. 7.5.2.3 Multiple Devices Connection
      3. 7.5.3 SPI
        1. 7.5.3.1 SPI Data Transactions
        2. 7.5.3.2 SPI Data Format
        3. 7.5.3.3 Multiple Devices Connection
  9. 8 Register Maps
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Application
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Program Procedure
      5. 9.2.5 Application Performance Plots
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.3.1 Time-Multiplexing Matrix

The LP5864 device uses time-multiplexing matrix scheme to support up to 72 LED dots with one chip. The device integrates 18 current sinks with 4 scan lines to drive 18 × 4 = 72 LED dots or 6 × 4 = 24 RGB pixels. In matrix control scheme, the device scans from Line 0 to Line 3 sequentially as shown in Figure 7-1. Current gain and PWM duty registers are programmable for each LED dot to support individual analog and PWM dimming.

LP5864 Scan Line Control Scheme Figure 7-1 Scan Line Control Scheme

There are 4 high-side p-channel MOSFETs (PMOS) integrated in LP5864 device. Users can flexibly set the active scan numbers from 1 to 4 by configuring the 'Max_Line_Num' in Dev_initial register. The time-multiplexing matrix timing sequence follows the Figure 7-2.

LP5864 Time-Multiplexing Matrix Timing Sequence Figure 7-2 Time-Multiplexing Matrix Timing Sequence

One cycle time of the line switching can be calculated as below:

Equation 1. t l i n e _ s w i t c h   =   t P W M + t S W _ B L K + 2 × t p h a s e _ s h i f t

Where:

  • tPWM is the current sink active time, which equals to 8μs (PWM frequency set at 125kHz) or 16μs (PWM frequency set at 62.5kHz) by configuring 'PWM_Fre' in Dev_initial register.
  • tSW_BLK is the switch blank time, which equals to 1μs or 0.5μs by configuring 'SW_BLK' in Dev_config1 register.
  • tphase_shift is the PWM phase shift time, which equal to 0 or 125ns by configuring 'PWM_Phase_Shift' in Dev_config1 register.

Total display time for one complete sub-period is tsub_period and can be calculated using Equation 2.

Equation 2. t s u b _ p e r i o d =   t l i n e _ s w i t c h × S c a n _ l i n e #

Where:

  • Scan_line# is the scan line number determined by 'Max_Line_Num' in Dev_initial register.

Figure 7-3 shows the time-multiplexing matrix scheme time diagram. The tCS_ON_Shift is the current sink turning on shift by configuring 'CS_ON_Shift' bit in Dev_config1 register.

LP5864 Time-Multiplexing Matrix Timing DiagramFigure 7-3 Time-Multiplexing Matrix Timing Diagram

The LP5864 device implements deghosting and low brightness compensation to remove the side effects of matrix topology:

  • Deghosting: both upside deghosting and downside deghosting are implemented to eliminate the LED's unexpected weak turn-on.
    • Upside_deghosting: discharge each scan line during the off state. By configuring the 'Up_Deghost' in Dev_config3 register, the LP5864 discharges and clamps the scan line switch to a certain voltage.
    • Downside_deghosting: pre-charge each current sink voltage during the off state. The deghosting capability can be adjusted through the 'Down_Deghost' in Dev_config3 register.
  • Low Brightness Compensation: Three groups compensation are implemented to overcome the color-shift and non-uniformity in low brightness conditions. The compensation capability can be through 'Comp_Group1', 'Comp_Group2', and 'Comp_Group3' in Dev_config2 register.
    • Compensation_group 1: CS0, CS3, CS6, CS9, CS12, CS15
    • Compensation_group 2: CS1, CS4, CS7, CS10, CS13, CS16
    • Compensation_group 3: CS2, CS5, CS8, CS11, CS14, CS17