SNVSCF0B October   2024  – May 2026 LM65680-Q1

ADVMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
    1. 5.1 Wettable Flanks
    2. 5.2 Pinout Design for Clearance and FMEA
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1  Input Voltage Range (VIN1, VIN2)
      2. 7.3.2  High-Voltage Bias Supply Subregulator (VCC, BIAS)
      3. 7.3.3  Precision Enable and Adjustable Input Voltage UVLO (EN/UVLO)
      4. 7.3.4  Output Voltage Setpoint (FB, BIAS)
      5. 7.3.5  Switching Frequency (RT)
      6. 7.3.6  Mode Selection and Clock Synchronization (MODE/SYNC)
        1. 7.3.6.1 Clock Synchronization
        2. 7.3.6.2 Clock Locking
      7. 7.3.7  Device Configuration (CNFG/SYNCOUT)
      8. 7.3.8  Dual-Random Spread Spectrum (DRSS)
      9. 7.3.9  High-Side MOSFET Gate Drive (BST)
      10. 7.3.10 Configurable Soft Start (SS)
        1. 7.3.10.1 Recovery From Dropout
      11. 7.3.11 Protection Features
        1. 7.3.11.1 Power-Good Monitor (PG)
        2. 7.3.11.2 Overcurrent and Short-Circuit Protection
        3. 7.3.11.3 Hiccup-Mode Protection
        4. 7.3.11.4 Thermal Shutdown
      12. 7.3.12 Two-Phase, Single-Output Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Power Train Components
        1. 8.1.1.1 Buck Inductor
        2. 8.1.1.2 Output Capacitors
        3. 8.1.1.3 Input Capacitors
        4. 8.1.1.4 EMI Filter
      2. 8.1.2 Error Amplifier and Compensation
      3. 8.1.3 Maximum Ambient Temperature
        1. 8.1.3.1 Derating Curves
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1 – 5V, 8A Synchronous Buck Regulator With Wide Input Voltage Range and High Efficiency
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Choosing the Switching Frequency
          3. 8.2.1.2.3  Buck Inductor Selection
          4. 8.2.1.2.4  Input Capacitor Selection
          5. 8.2.1.2.5  Output Capacitors
          6. 8.2.1.2.6  Output Voltage Setpoint
          7. 8.2.1.2.7  Compensation Components
          8. 8.2.1.2.8  Setting the Input Voltage UVLO
          9. 8.2.1.2.9  EMI Mitigation, RDRSS
          10. 8.2.1.2.10 Bootstrap Capacitor, CBST
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Design 2 – High Efficiency, 48V to 12V, 8A, 400kHz Synchronous Buck Regulator
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Buck Inductor Selection
          2. 8.2.2.2.2 Input Capacitor Selection
          3. 8.2.2.2.3 Output Capacitors
          4. 8.2.2.2.4 Output Voltage Setpoint
          5. 8.2.2.2.5 Compensation Components
          6. 8.2.2.2.6 Feedforward Capacitor
          7. 8.2.2.2.7 Soft-Start Capacitor
        3. 8.2.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Thermal Design and Layout
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
        1. 9.2.1.1 Low-EMI Design Resources
        2. 9.2.1.2 Thermal Design Resources
        3. 9.2.1.3 Multiphase Design Resources
        4. 9.2.1.4 PCB Layout Resources
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

8.2.2.1 Design Requirements

The following example provides design information based on the specifications in Table 8-7.

Table 8-7 Detailed Design Parameters
DESIGN PARAMETER VALUE
Input voltage range (steady state) 24V to 60V
Minimum transient input voltage (cold crank) 18V
Maximum transient input voltage (load dump) 65V
Input voltage UVLO turn on 16V
Output voltage 12V
Output current 0A to 8A
Output voltage regulation ±1%
Switching frequency 400kHz
Loop crossover frequency, phase margin 50kHz, 55°
Soft-start time 6ms

The switching frequency is set at 400kHz by resistor RRT. In terms of control loop performance, the target loop crossover frequency is 50kHz with a phase margin greater than 55°.

Table 8-8 cites the selected buck regulator powertrain components, with many of the components available from multiple vendors. This design uses a low-DCR inductor with composite core material and an all-ceramic output capacitor implementation.

Table 8-8 List of Materials for Application Circuit 2
REFERENCE DESIGNATOR QTY SPECIFICATION VENDOR(1) PART NUMBER
CIN1, CIN2 4 10μF, 100V, X7R, 1210, ceramic, AEC-Q200 Murata GCM32EC72A106KEC2
TDK CGA6P1X7R2A106K
CIN-HF1, CIN-HF2 2 100nF, 100V, X7R, 0603, ceramic, AEC-Q200 Murata GCJ188R72A104M
COUT 4 22µF, 25V, X7S, 1210, ceramic, AEC-Q200 Murata GCM32EC71E226KE36
22µF, 25V, X7R, 1210, ceramic, AEC-Q200 TDK CGA6P3X7R1E226M
LO 1 6.8µH, 12.5mΩ, 10.9A, 6.6 × 6.4 × 6.1mm, AEC-Q200 Würth Elektronik 744393465068
6.8µH, 12.7mΩ, 10.5A, 6.6 × 6.4 × 6mm, AEC-Q200 XFMRS XFHCL6060HC-6R8M
8.2µH, 10.7mΩ, 19.5A, 11.3 × 10 × 6mm, AEC-Q200 Würth Elektronik 744393665082
U1 1 LM65680-Q1 65V, 8A synchronous buck converter, AEC-Q100 Texas Instruments LM65680