SNVSCP5C April   2025  – August 2026 TPS7H3024-SP , TPS7H3034-SP , TPS7H3124-SP , TPS7H3134-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Quality Conformance Inspection
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (IN), VLDO, and REFCAP
        1. 8.3.1.1 Undervoltage Lockout (VPOR_IN < VIN < UVLO)
        2. 8.3.1.2 Power-On Reset (VIN < VPOR_IN)
      2. 8.3.2 SR_UVLO
      3. 8.3.3 SENSEx Inputs
        1. 8.3.3.1 VTH_SENSEX and VOUTx_RISE
        2. 8.3.3.2 IHYS_SENSEx and VOUTx_FALL
        3. 8.3.3.3 Input to Output Time Diagrams
        4. 8.3.3.4 Top and Bottom Resistive Divider Design Equations
      4. 8.3.4 MODE
      5. 8.3.5 Output Stages (RESETx, PWRGD, WDO, PULL_UP1, and PULL_UP2)
        1. 8.3.5.1 Push-Pull Outputs
        2. 8.3.5.2 Open-Drain Outputs (TPS7H3124 and TPS7H3134)
      6. 8.3.6 WDI
      7. 8.3.7 User-Programmable TIMERS
        1. 8.3.7.1 DLY_TMR
        2. 8.3.7.2 WD_TMR
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Window Voltage Monitoring
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Input Power Supplies and Decoupling Capacitors
          2. 9.2.1.2.2 SR_UVLO Threshold
          3. 9.2.1.2.3 SENSEx Thresholds
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Supervision of Negative Voltage Rails
        1. 9.2.2.1 Negative Voltage Monitoring Example
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.3.5.2 Open-Drain Outputs (TPS7H3124 and TPS7H3134)

In the open-drain variants (TPS7H31x4) the pins are externally pulled-up through a resistor to a voltage source with the desired logic level. The maximum pull-up voltage for the outputs (RESETx, PWRGD and WDO) is 7V. Select the pull-up resistor value to keep the maximum current sunk by the outputs below the recommended operating condition maximum of 2mA. Generally a pull up resistor of 10kΩ is sufficient. Using a larger value resistor will minimize power dissipation but can allow noise to couple into the outputs signal due a "weaker" pull-up. Refer to Figure 8-17 and Figure 8-18.

TPS7H3024-SP TPS7H3034-SP TPS7H3124-SP TPS7H3134-SP RESETx, PWRGD and WDO Outputs in Open-Drain Figure 8-17 RESETx, PWRGD and WDO Outputs in Open-Drain
TPS7H3024-SP TPS7H3034-SP TPS7H3124-SP TPS7H3134-SP RESETx overvoltage (OV) Outputs in Open-Drain
A. Only the RESETx are dependent on the type of channel as: UV or OV. This is dependent in the logical value of the MODE input pin.
Figure 8-18 RESETx overvoltage (OV) Outputs in Open-Drain