SNVSCS6 March   2026 TPS7H1301-SP

ADVMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options Table
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Quality Conformance Inspection
    7. 7.7 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Enable
      2. 9.3.2  Charge Pump
        1. 9.3.2.1 Charge Pump Operation
        2. 9.3.2.2 Foldback Switching
      3. 9.3.3  Startup
      4. 9.3.4  Power Good
      5. 9.3.5  Output Voltage
      6. 9.3.6  Dropout
      7. 9.3.7  Output Voltage Accuracy
      8. 9.3.8  Output Noise
      9. 9.3.9  Power Supply Rejection Ratio
      10. 9.3.10 Stability
        1. 9.3.10.1 Stability of the TPS7H1301
        2. 9.3.10.2 Stability of the TPS7H1302
      11. 9.3.11 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Enable Disable
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Capacitor Selection
          1. 10.2.2.1.1 Input Capacitor (CIN) Selection
          2. 10.2.2.1.2 CFLY
          3. 10.2.2.1.3 CPOUT Capacitor
          4. 10.2.2.1.4 Bypass Capacitors
          5. 10.2.2.1.5 Output Capacitor
        2. 10.2.2.2 Charge Pump Output Resistance
        3. 10.2.2.3 Output Noise
        4. 10.2.2.4 PSRR Design Implications
        5. 10.2.2.5 Stability Design Considerations
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1.     69

7.5 Electrical Characteristics

Over 3V ≤ VIN ≤ 6.3V, VOUT(set) = -1.8, IOUT = 10mA, CREF = 47nF, over operating temperature range (TA = -55℃ to 125℃), typical values are at TA = 25℃, unless otherwise noted; includes RLAT at TA = 25℃ if sub-group number is present for QML RHA and SEP devices(4).
PARAMETER TEST CONDITIONS Subgroup MIN TYP MAX UNIT
POWER SUPPLIES and CURRENTS
IQ Quiescent Current T{S7H1301
IOUT = 0A, VEN = 7V		 1, 2, 3 15 45 mA
TPS7H1302
IOUT = 0A, VEN = 7V		 1, 2, 3 12 45
ISHDN Shutdown Current VEN = 0V, IOUT = 0A 1, 2, 3 0.8 1.5 mA
IFB Feedback leakage current TPS7H1301
VFB = -0.7V		 1, 2, 3 25 100 nA
ENABLE
VEN(rising) Enable rising threshold (turn-on) 1, 2, 3 0.57 0.6 0.625 V
VEN(falling) Enable falling threshold (turn-off) 1, 2, 3 0.445 0.5 0.555 V
tEN(delay) EN propagation delay EN high to PG high at VIN = 5V VIN = -1.8V  1, 2, 3 14 18 ms
IEN(LKG) Enable leakage current VEN = 7V 1, 2, 3 25 100 nA
TSD(enter) Thermal shutdown enter temperature 160 ℃
TSD(exit) Thermal shutdown exit temperature 130 ℃
POWER GOOD
VPG(rise) Power good rising threshold as a percent of VOUT Slew rate VOUT = 10V/s 1, 2, 3 92% 95% 98%
VPG(fall) Power good falling threshold as a percent of VOUT Slew rate VOUT = 10V/s 1, 2, 3 87% 90% 93%
VPG(OL) Power good output low IPG(SINK) = 2mA 1, 2, 3 90 190 mV
VIN(MIN_PG) Minimum VIN for valid PG
(VPG = 0.5V)		 IPG(sink) = 0.5mA 1, 2, 3 0.8 1 V
IPG(LKG) Power good leakage TPS7H1301
VPG = 7V, VFB = –0.7V		 1, 2, 3 0.05 2 µA
CHARGE PUMP
RDISCHARGE CPOUT discharge resistance CCPOUT = 10µF VCPOUT = –0.3V 75 Ω
tDISCHARGE CPOUT discharge time (CPOUT = –0.3V) to GND CCPOUT = 10µF 6.5 ms
fSW Switching frequency (TPS7H1301)(1) 9, 10, 11 400 500 600 kHz
fSW Switching frequency (TPS7H1302)(2) 9, 10, 11 800 1000 1200 kHz
fSW(FB) Foldback frequency switching frequency (1301) 125 kHz
fSW(FB) Foldback frequency switching frequency (1302) 250 kHz
RDS(ON) Switch array MOSFET1 drain source resistance IRDSON = 100mA
VIN = 5V		 TA = 125℃ 2 355 385 mΩ
TA = 25℃ 1 265 295
TA = -55℃ 3 235 265
RCP(OUT) Output resistance to CPOUT
(TPS7H1301)(1)		 IL = 150mA  VIN = 3V 4.5 Ω
IL = 250mA  VIN = 5V 3.5
VIN = 6.3V 3.1
RCP(OUT) Output resistance to CPOUT
(TPS7H1302)(2)		 IL = 150mA  VIN = 3V 4.8 Ω
IL = 250mA  VIN = 5V 3.7
VIN = 6.3V 3.3
VDROOP Droop Voltage
VDROOP =  VIN - |VCPOUT| 
(TPS7H1301)(1)		 VIN = 3V IOUT = 10mA 135 mV
IOUT = 250mA 1260
VIN = 5V IOUT = 10mA 105
IOUT = 400mA 1400
VIN = 6.3V IOUT = 10mA 93
IOUT = 400mA 1240
VDROOP Droop Voltage
VDROOP =  VIN - |VCPOUT|
(TPS7H1302)(2)		 VIN = 3V IOUT = 10mA 144 mV
IOUT = 250mA 1344
VIN = 5V IOUT = 10mA 111
IOUT = 400mA 1591
VIN = 6.3V IOUT = 10mA 100
IOUT = 400mA 1420
DROPOUT
IDO Dropout current (TPS7H1301)(3) VOUT(set) = –1.8V
IOUT(meas.) = 98% × VOUT(NOM)		 VIN = 3V 1, 2, 3 75 125 mA
VIN = 3.3V 1, 2, 3 100 150
VIN = 4V 1, 2, 3 200 300
VIN = 5V 1, 2, 3 400
VIN = 6V 1, 2, 3 400
VOUT(set) = –5V
IOUT(meas.) = 98% × VOUT(NOM)		 VIN = 5.5V 1, 2, 3 40 50
VIN = 6V 1, 2, 3 250 300
Dropout current (TPS7H1302)(3) VOUT(set) = –1.8V
IOUT(meas.) = 98% × VOUT(NOM)		 VIN = 5.5V 1, 2, 3 40 50
VIN = 6V 1, 2, 3 250 300
ACCURACY
VACC Output voltage accuracy –5V ≤ VOUT ≤ VCP(OUT) - VDO
1mA ≤ IOUT ≤ 400mA		 1, 2, 3 –1.5% 1.5%
ΔVOUT/ΔVIN Line regulation 3.3V ≤ VIN ≤ 6.3V ΔV = 3V
IOUT = 150mA		 1, 2, 3 100 1300 µV/V
ΔVOUT/ΔIOUT Load regulation (1301) 10mA ≤ IOUT ≤400mA
VIN = 5V, VOUT = -1.8V		 1, 2, 3 8 35 mV/A
Load regulation (1302) 10mA ≤ IOUT ≤400mA
VIN = 5V, VOUT = -1.8V		 10mA ≤ IOUT ≤400mA
VIN = 5V, VOUT = -1.8V		 1, 2, 3 24 70 mV/A
VREF Internal reference voltage 1, 2, 3 –0.606 –0.6 –0.594 V
RIPPLE, NOISE AND PSRR
PSRRLDO LDO power-supply rejection ratio VCPOUT = –5V, VOUT = –1.8V, IOUT = 250mA fripple = 100Hz 60 dB
fripple = 1kHz 58 dB
fripple = 10kHz 47 dB
fripple = 100kHz 45 dB
fripple = 500kHz 26 dB
fripple = 1MHz 26 dB
VRIP(CP) Voltage ripple at charge pump (BW < 2Mhz) IOUT = 400mA
VCPOUT = -5V
VOUT = -1.8V		 32 mVPP
VRIP(OUT) Voltage ripple at device output (BW < 2Mhz) IOUT = 400mA
VCPOUT = -5V
VOUT = -1.8V		 3 mVPP
VN_OUT Output noise voltage
(bandwidth from 10Hz to 100kHz)		 VCPOUT= –5V, VOUT = –1.8V, IOUT = 250mA 20 µVRMS
(1) CFLY = 1µF, CCPOUT = 10µF, COUT = 22µF
(2) CFLY = 0.47µF, CCPOUT = 4.7µF, COUT = 22µF
(4) See the 5962R2421501 SMD for additional information on the QML RHA devices and see the VID for additional information on the SEP devices.