SNVU695A June   2020  – January 2022 LP87702-Q1

 

  1. 1Introduction
  2. 2xWR Power Supply Requirements
    1. 2.1 Recommended Supply Voltage Requirements
    2. 2.2 Input Supply Current Requirements
    3. 2.3 Input Supply Ripple Requirements
  3. 3Power Solution
    1. 3.1 1.0 V and 1.8 V RF Rail LC Filters
  4. 4Measurements
  5. 5Schematic
  6. 6Bill of Materials
  7. 7Conclusion
  8. 8References
  9. 9Revision History

1 Introduction

The LP87702K-Q1 has two individual buck converters and one boost converter. The LP87702K-Q1 is OTP programmable, meaning default register values are set in the TI production line to the desired values and it is also possible to control the registers through the I2C after power-up. See the LP877020-Q1 Configuration Guide for details on how to use and configure LP87702K-Q1 through the I2C. The main OTP settings for power rails are listed in Table 1-1.

Table 1-1 Main OTP Settings for Power Rails
Group Description Bit Name LP87702K-Q1
Device Identification OTP configuration OTP_ID 23h
Revision for OTP_ID OTP_REV 0
BUCK0 Output voltage BUCK0_VSET 1.8 V
Enable, EN-pin or I2C register BUCK0_EN_PIN_CTRL, BUCK0_EN EN1
Force PWM BUCK0_FPWM Yes
Peak current limit BUCK0_ILIM 4 A
Maximum load current N/A 3 A
BUCK1 Output voltage BUCK1_VSET 1.01 V
Enable, EN-pin or I2C register BUCK1_EN_PIN_CTRL, BUCK1_EN EN1
Force PWM BUCK1_FPWM Yes
Peak current limit BUCK1_ILIM 4.5 A
Maximum load current N/A 3.5 A
BOOST Mode, boost, or bypass N/A Boost
Output voltage BOOST_VSET 5 V
Enable, EN-pin, or I2C register BOOST_EN_PIN_CTRL, BOOST_EN EN1
Peak current limit BOOST_ILIM 1.4 A
Maximum load current N/A 0.6 A
VANA VANA over-voltage threshold N/A 4.3 V rising

The full list of register bits loaded from the OTP memory are shown in LP87702-Q1 Technical Reference Manual.