SNVU695A June   2020  – January 2022 LP87702-Q1

 

  1. 1Introduction
  2. 2xWR Power Supply Requirements
    1. 2.1 Recommended Supply Voltage Requirements
    2. 2.2 Input Supply Current Requirements
    3. 2.3 Input Supply Ripple Requirements
  3. 3Power Solution
    1. 3.1 1.0 V and 1.8 V RF Rail LC Filters
  4. 4Measurements
  5. 5Schematic
  6. 6Bill of Materials
  7. 7Conclusion
  8. 8References
  9. 9Revision History

2.2 Input Supply Current Requirements

Table 2-2 provides the peak supply current specifications and Table 2-3 provides the average power numbers. The typical supply currents and the average power depends on the application software and chirp configuration.

Table 2-2 AWR1843 Peak Current Specification
Supply nameDescriptionMaximum (mA)
VDDIN, VIN_SRAM, VNWATotal current drawn by all nodes driven by 1.2 V rail.1000
VIN_13RF1, VIN_13RF2Total current drawn by all nodes driven by 1.3 V or 1.0 V rail (2 TX, 4 RX simultaneously).(1)2000
VIOIN_18, VIN_18CLK, VIOIN_18DIFF, VIN_18BB, VIN_18VCOTotal current drawn by all nodes driven by 1.8 V rail.850
VIOINTotal current drawn by all nodes driven by 3.3 V rail.50
(1) 3 Transmitters can be simultaneously deployed only in AWR1243P and AWR1843 devices with 1V/ LDO bypass and PA LDO disable mode. In this mode 1 V supply needs to be fed on the VOUT PA pin. In this case the peak 1 V supply current goes up to 2500 mA.
Table 2-3 AWR Average Power Consumption
ConditionDescriptionTypical (W)
1.0 V internal LDO bypass mode25 % duty cycle1TX, 4RXUse Case: Low power mode, 3.2 MSps complex transceiver, 25 ms frame time, 128 chirps, 128 samples/chirp, 8 μs interchirp time (25 % duty cycle), and DSP active.1.3
2TX, 4RX1.38
50 % duty cycle1TX, 4RXUse Case: Low power mode, 3.2 MSps complex transceiver, 25 ms frame time, 256 chirps, 128 samples/chirp, 8 μs interchirp time (50 % duty cycle), and DSP active.1.77
2TX, 4RX1.92
1.3 V internal LDO enabled mode25 % duty cycle1TX, 4RXUse Case: Low power mode, 3.2 MSps complex transceiver, 25 ms frame time, 128 chirps, 128 samples/chirp, 8 μs interchirp time (25 % duty cycle), and DSP active.1.4
2TX, 4RX1.48
50 % duty cycle1TX, 4RXUse Case: Low power mode, 3.2 MSps complex transceiver, 25 ms frame time, 256 chirps, 128 samples/chirp, 8 μs interchirp time (50 % duty cycle), and DSP active.1.94
2TX, 4RX2.14