SNVU786 May   2021 LP5860

 

  1.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3. 1.1 Glossary
    4.     Related Documentation
    5. 1.1 Support Resources
    6.     Trademarks
  2. 1Introduction/Feature Overview
    1. 1.1 Overview
    2. 1.2 Description
  3. 2 Register Maps
    1. 2.1  Register Map Table
    2. 2.2  CONFIG Registers
    3. 2.3  GROUP Registers
    4. 2.4  LED_DOT_GROUP Registers
    5. 2.5  LED_DOT_ONOFF Registers
    6. 2.6  FAULT_STATE Registers
    7. 2.7  LOD Registers
    8. 2.8  LSD Registers
    9. 2.9  LOD_CLR Registers
    10. 2.10 LSD_CLR Registers
    11. 2.11 RESET Registers
    12. 2.12 DC Registers
    13. 2.13 PWM Registers
  4. 3Revision History

2.6 FAULT_STATE Registers

Table 2-106 lists the FAULT_STATE registers. All register offset addresses not listed in Table 2-106 should be considered as reserved locations and the register contents should not be modified.

Global LOD/LSD Flag

Table 2-106 FAULT_STATE Registers
Address Acronym Register Name Section
64h Fault_state Global LOD/LSD indication register Go

2.6.1 Fault_state Register (Address = 64h) [Default = 0h]

Fault_state is shown in Figure 2-101 and described in Table 2-107.

Return to the Summary Table.

Figure 2-101 Fault_state Register
7 6 5 4 3 2 1 0
RESERVED Global_LOD Global_LSD
R-0h R-0h R-0h
Table 2-107 Fault_state Register Field Descriptions
Bit Field Type Default Description
7-2 RESERVED R 0h Reserved
1 Global_LOD R 0h LOD indication bit if there is open fault detected at any LED dot
0h = Not open
1h = Open
0 Global_LSD R 0h LSD indication bit if there is short fault detected at any LED dot
0h = Not short
1h = Short