SNVU926 October 2024 LP5810
Table 2-30 lists the memory-mapped registers for the Fault_Clear registers. All register offset addresses not listed in Table 2-30 should be considered as reserved locations and the register contents should not be modified.
| Offset | Acronym | Register Name | Section |
|---|---|---|---|
| 22h | Fault_Clear | Clear the LOD/LSD/TSD flats | Go |
Complex bit access types are encoded to fit into small table cells. Table 2-31 shows the codes that are used for access types in this section.
| Access Type | Code | Description |
|---|---|---|
| Read Type | ||
| R | R | Read |
| Write Type | ||
| W | W | Write |
| W1C | W 1C | Write 1 to clear |
| Reset or Default Value | ||
| -n | Value after reset or the default value | |
Fault_Clear is shown in Figure 2-21 and described in Table 2-32.
Return to the Summary Table.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | tsd_clear | lsd_clear | lod_clear | ||||
| R-0h | W1C-0h | W1C-0h | W1C-0h | ||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-3 | RESERVED | R | 0h | Reserved |
| 2 | tsd_clear | W1C | 0h | TSD Fault Status Clear; Write 1 to clear and read back 0 |
| 1 | lsd_clear | W1C | 0h | LSD Fault Status Clear; Write 1 to clear and read back 0 |
| 0 | lod_clear | W1C | 0h | LOD Fault Status Clear; Write 1 to clear and read back 0 |