SNVU926 User guide

SNVU926 October 2024 LP5810

2.14 LED_3_Autonomous_Animation Registers

Table 2-138 lists the memory-mapped registers for the LED_3_Autonomous_Animation registers. All register offset addresses not listed in Table 2-138 should be considered as reserved locations and the register contents should not be modified.

Table 2-138 LED_3_AUTONOMOUS_ANIMATION Registers

Offset	Acronym	Register Name	Section
CEh	LED_3_Auto_Pause	Animation pause time at the start and the end of LED_3	Go
CFh	LED_3_Auto_Playback	Animation pattern playback times of LED_3 and active AEU number setting	Go
D0h	LED_3_AEU1_PWM_1	PWM setting of LED_3 AEU1_PWM1	Go
D1h	LED_3_AEU1_PWM_2	PWM setting of LED_3 AEU1_PWM2	Go
D2h	LED_3_AEU1_PWM_3	PWM setting of LED_3 AEU1_PWM3	Go
D3h	LED_3_AEU1_PWM_4	PWM setting of LED_3 AEU1_PWM4	Go
D4h	LED_3_AEU1_PWM_5	PWM setting of LED_3 AEU1_PWM5	Go
D5h	LED_3_AEU1_T12	Slope time setting of LED_3 AEU1_T1 and AEU1_T2	Go
D6h	LED_3_AEU1_T34	Slope time setting of LED_3 AEU1_T3 and AEU1_T4	Go
D7h	LED_3_AEU1_Playback	AEU1 pattern playback times of LED_3	Go
D8h	LED_3_AEU2_PWM_1	PWM setting of LED_3 AEU2_PWM1	Go
D9h	LED_3_AEU2_PWM_2	PWM setting of LED_3 AEU2_PWM2	Go
DAh	LED_3_AEU2_PWM_3	PWM setting of LED_3 AEU2_PWM3	Go
DBh	LED_3_AEU2_PWM_4	PWM setting of LED_3 AEU2_PWM4	Go
DCh	LED_3_AEU2_PWM_5	PWM setting of LED_3 AEU2_PWM5	Go
DDh	LED_3_AEU2_T12	Slope time setting of LED_3 AEU2_T1 and AEU2_T2	Go
DEh	LED_3_AEU2_T34	Slope time setting of LED_3 AEU2_T3 and AEU2_T4	Go
DFh	LED_3_AEU2_Playback	AEU2 pattern playback times of LED_3	Go
E0h	LED_3_AEU3_PWM_1	PWM setting of LED_3 AEU3_PWM1	Go
E1h	LED_3_AEU3_PWM_2	PWM setting of LED_3 AEU3_PWM2	Go
E2h	LED_3_AEU3_PWM_3	PWM setting of LED_3 AEU3_PWM3	Go
E3h	LED_3_AEU3_PWM_4	PWM setting of LED_3 AEU3_PWM4	Go
E4h	LED_3_AEU3_PWM_5	PWM setting of LED_3 AEU3_PWM5	Go
E5h	LED_3_AEU3_T12	Slope time setting of LED_3 AEU3_T1 and AEU3_T2	Go
E6h	LED_3_AEU3_T34	Slope time setting of LED_3 AEU3_T3 and AEU3_T4	Go
E7h	LED_3_AEU3_Playback	AEU3 pattern playback times of LED_3	Go

Complex bit access types are encoded to fit into small table cells. Table 2-139 shows the codes that are used for access types in this section.

Table 2-139 LED_3_Autonomous_Animation Access Type Codes

Access Type	Code	Description
Read Type
R	R	Read
Write Type
W	W	Write
Reset or Default Value
-n		Value after reset or the default value

2.14.1 LED_3_Auto_Pause Register (Offset = CEh) [Reset = 00h]

LED_3_Auto_Pause is shown in Figure 2-113 and described in Table 2-140.

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Figure 2-113 LED_3_Auto_Pause Register

7	6	5	4	3	2	1	0
led_3_tp_ts				led_3_tp_te
R/W-0h				R/W-0h

Table 2-140 LED_3_Auto_Pause Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_tp_ts	R/W	0h	Animation pause time at the start of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_tp_te	R/W	0h	Animation pause time at the end of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.2 LED_3_Auto_Playback Register (Offset = CFh) [Reset = 00h]

LED_3_Auto_Playback is shown in Figure 2-114 and described in Table 2-141.

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Figure 2-114 LED_3_Auto_Playback Register

7	6	5	4	3	2	1	0
RESERVED		led_3_aeu_num		led_3_pt
R-0h		R/W-0h		R/W-0h

Table 2-141 LED_3_Auto_Playback Register Field Descriptions

Bit	Field	Type	Reset	Description
7-6	RESERVED	R	0h	Reserved
5-4	led_3_aeu_num	R/W	0h	Active AEU number of LED_3 selection; 0h = only use AEU1; 1h = use AEU1 and AEU2; 2h = use AEU1, AEU2 and AEU3; 3h = use AEU1, AEU2 and AEU3 (the same as 2h)
3-0	led_3_pt	R/W	0h	Animation pattern playback times of LED_3; 0h = 0 times; 1h = 1 times; 2h = 2 times; 3h = 3 times; 4h = 4 times; 5h = 5 times; 6h = 6 times; 7h = 7 times; 8h = 8 times; 9h = 9 times; Ah = 10 times; Bh = 11 times; Ch = 12 times; Dh = 13 times; Eh = 14 times; Fh = infinite times

2.14.3 LED_3_AEU1_PWM_1 Register (Offset = D0h) [Reset = 00h]

LED_3_AEU1_PWM_1 is shown in Figure 2-115 and described in Table 2-142.

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Figure 2-115 LED_3_AEU1_PWM_1 Register

7	6	5	4	3	2	1	0
led_3_aeu1_pwm1
R/W-0h

Table 2-142 LED_3_AEU1_PWM_1 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu1_pwm1	R/W	0h	AEU1_PWM1 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.4 LED_3_AEU1_PWM_2 Register (Offset = D1h) [Reset = 00h]

LED_3_AEU1_PWM_2 is shown in Figure 2-116 and described in Table 2-143.

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Figure 2-116 LED_3_AEU1_PWM_2 Register

7	6	5	4	3	2	1	0
led_3_aeu1_pwm2
R/W-0h

Table 2-143 LED_3_AEU1_PWM_2 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu1_pwm2	R/W	0h	AEU1_PWM2 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.5 LED_3_AEU1_PWM_3 Register (Offset = D2h) [Reset = 00h]

LED_3_AEU1_PWM_3 is shown in Figure 2-117 and described in Table 2-144.

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Figure 2-117 LED_3_AEU1_PWM_3 Register

7	6	5	4	3	2	1	0
led_3_aeu1_pwm3
R/W-0h

Table 2-144 LED_3_AEU1_PWM_3 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu1_pwm3	R/W	0h	AEU1_PWM3 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.6 LED_3_AEU1_PWM_4 Register (Offset = D3h) [Reset = 00h]

LED_3_AEU1_PWM_4 is shown in Figure 2-118 and described in Table 2-145.

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Figure 2-118 LED_3_AEU1_PWM_4 Register

7	6	5	4	3	2	1	0
led_3_aeu1_pwm4
R/W-0h

Table 2-145 LED_3_AEU1_PWM_4 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu1_pwm4	R/W	0h	AEU1_PWM4 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.7 LED_3_AEU1_PWM_5 Register (Offset = D4h) [Reset = 00h]

LED_3_AEU1_PWM_5 is shown in Figure 2-119 and described in Table 2-146.

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Figure 2-119 LED_3_AEU1_PWM_5 Register

7	6	5	4	3	2	1	0
led_3_aeu1_pwm5
R/W-0h

Table 2-146 LED_3_AEU1_PWM_5 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu1_pwm5	R/W	0h	AEU1_PWM5 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.8 LED_3_AEU1_T12 Register (Offset = D5h) [Reset = 00h]

LED_3_AEU1_T12 is shown in Figure 2-120 and described in Table 2-147.

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Figure 2-120 LED_3_AEU1_T12 Register

7	6	5	4	3	2	1	0
led_3_aeu1_t2				led_3_aeu1_t1
R/W-0h				R/W-0h

Table 2-147 LED_3_AEU1_T12 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_aeu1_t2	R/W	0h	AEU1_T2 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_aeu1_t1	R/W	0h	AEU1_T1 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.9 LED_3_AEU1_T34 Register (Offset = D6h) [Reset = 00h]

LED_3_AEU1_T34 is shown in Figure 2-121 and described in Table 2-148.

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Figure 2-121 LED_3_AEU1_T34 Register

7	6	5	4	3	2	1	0
led_3_aeu1_t4				led_3_aeu1_t3
R/W-0h				R/W-0h

Table 2-148 LED_3_AEU1_T34 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_aeu1_t4	R/W	0h	AEU1_T4 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_aeu1_t3	R/W	0h	AEU1_T3 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.10 LED_3_AEU1_Playback Register (Offset = D7h) [Reset = 00h]

LED_3_AEU1_Playback is shown in Figure 2-122 and described in Table 2-149.

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Figure 2-122 LED_3_AEU1_Playback Register

7	6	5	4	3	2	1	0
RESERVED						led_3_aeu1_pt
R-0h						R/W-0h

Table 2-149 LED_3_AEU1_Playback Register Field Descriptions

Bit	Field	Type	Reset	Description
7-2	RESERVED	R	0h	Reserved
1-0	led_3_aeu1_pt	R/W	0h	AEU1 pattern playback times of LED_3; 0h = 0 time; 1h = 1 time; 2h = 2 times; 3h = Infinite times

2.14.11 LED_3_AEU2_PWM_1 Register (Offset = D8h) [Reset = 00h]

LED_3_AEU2_PWM_1 is shown in Figure 2-123 and described in Table 2-150.

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Figure 2-123 LED_3_AEU2_PWM_1 Register

7	6	5	4	3	2	1	0
led_3_aeu2_pwm1
R/W-0h

Table 2-150 LED_3_AEU2_PWM_1 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu2_pwm1	R/W	0h	AEU2_PWM1 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.12 LED_3_AEU2_PWM_2 Register (Offset = D9h) [Reset = 00h]

LED_3_AEU2_PWM_2 is shown in Figure 2-124 and described in Table 2-151.

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Figure 2-124 LED_3_AEU2_PWM_2 Register

7	6	5	4	3	2	1	0
led_3_aeu2_pwm2
R/W-0h

Table 2-151 LED_3_AEU2_PWM_2 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu2_pwm2	R/W	0h	AEU2_PWM2 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.13 LED_3_AEU2_PWM_3 Register (Offset = DAh) [Reset = 00h]

LED_3_AEU2_PWM_3 is shown in Figure 2-125 and described in Table 2-152.

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Figure 2-125 LED_3_AEU2_PWM_3 Register

7	6	5	4	3	2	1	0
led_3_aeu2_pwm3
R/W-0h

Table 2-152 LED_3_AEU2_PWM_3 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu2_pwm3	R/W	0h	AEU2_PWM3 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.14 LED_3_AEU2_PWM_4 Register (Offset = DBh) [Reset = 00h]

LED_3_AEU2_PWM_4 is shown in Figure 2-126 and described in Table 2-153.

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Figure 2-126 LED_3_AEU2_PWM_4 Register

7	6	5	4	3	2	1	0
led_3_aeu2_pwm4
R/W-0h

Table 2-153 LED_3_AEU2_PWM_4 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu2_pwm4	R/W	0h	AEU2_PWM4 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.15 LED_3_AEU2_PWM_5 Register (Offset = DCh) [Reset = 00h]

LED_3_AEU2_PWM_5 is shown in Figure 2-127 and described in Table 2-154.

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Figure 2-127 LED_3_AEU2_PWM_5 Register

7	6	5	4	3	2	1	0
led_3_aeu2_pwm5
R/W-0h

Table 2-154 LED_3_AEU2_PWM_5 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu2_pwm5	R/W	0h	AEU2_PWM5 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.16 LED_3_AEU2_T12 Register (Offset = DDh) [Reset = 00h]

LED_3_AEU2_T12 is shown in Figure 2-128 and described in Table 2-155.

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Figure 2-128 LED_3_AEU2_T12 Register

7	6	5	4	3	2	1	0
led_3_aeu2_t2				led_3_aeu2_t1
R/W-0h				R/W-0h

Table 2-155 LED_3_AEU2_T12 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_aeu2_t2	R/W	0h	AEU2_T2 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_aeu2_t1	R/W	0h	AEU2_T1 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.17 LED_3_AEU2_T34 Register (Offset = DEh) [Reset = 00h]

LED_3_AEU2_T34 is shown in Figure 2-129 and described in Table 2-156.

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Figure 2-129 LED_3_AEU2_T34 Register

7	6	5	4	3	2	1	0
led_3_aeu2_t4				led_3_aeu2_t3
R/W-0h				R/W-0h

Table 2-156 LED_3_AEU2_T34 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_aeu2_t4	R/W	0h	AEU2_T4 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_aeu2_t3	R/W	0h	AEU2_T3 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.18 LED_3_AEU2_Playback Register (Offset = DFh) [Reset = 00h]

LED_3_AEU2_Playback is shown in Figure 2-130 and described in Table 2-157.

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Figure 2-130 LED_3_AEU2_Playback Register

7	6	5	4	3	2	1	0
RESERVED						led_3_aeu2_pt
R-0h						R/W-0h

Table 2-157 LED_3_AEU2_Playback Register Field Descriptions

Bit	Field	Type	Reset	Description
7-2	RESERVED	R	0h	Reserved
1-0	led_3_aeu2_pt	R/W	0h	AEU2 pattern playback times of LED_3; 0h = 0 time; 1h = 1 time; 2h = 2 times; 3h = Infinite times

2.14.19 LED_3_AEU3_PWM_1 Register (Offset = E0h) [Reset = 00h]

LED_3_AEU3_PWM_1 is shown in Figure 2-131 and described in Table 2-158.

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Figure 2-131 LED_3_AEU3_PWM_1 Register

7	6	5	4	3	2	1	0
led_3_aeu3_pwm1
R/W-0h

Table 2-158 LED_3_AEU3_PWM_1 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu3_pwm1	R/W	0h	AEU3_PWM1 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.20 LED_3_AEU3_PWM_2 Register (Offset = E1h) [Reset = 00h]

LED_3_AEU3_PWM_2 is shown in Figure 2-132 and described in Table 2-159.

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Figure 2-132 LED_3_AEU3_PWM_2 Register

7	6	5	4	3	2	1	0
led_3_aeu3_pwm2
R/W-0h

Table 2-159 LED_3_AEU3_PWM_2 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu3_pwm2	R/W	0h	AEU3_PWM2 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.21 LED_3_AEU3_PWM_3 Register (Offset = E2h) [Reset = 00h]

LED_3_AEU3_PWM_3 is shown in Figure 2-133 and described in Table 2-160.

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Figure 2-133 LED_3_AEU3_PWM_3 Register

7	6	5	4	3	2	1	0
led_3_aeu3_pwm3
R/W-0h

Table 2-160 LED_3_AEU3_PWM_3 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu3_pwm3	R/W	0h	AEU3_PWM3 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.22 LED_3_AEU3_PWM_4 Register (Offset = E3h) [Reset = 00h]

LED_3_AEU3_PWM_4 is shown in Figure 2-134 and described in Table 2-161.

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Figure 2-134 LED_3_AEU3_PWM_4 Register

7	6	5	4	3	2	1	0
led_3_aeu3_pwm4
R/W-0h

Table 2-161 LED_3_AEU3_PWM_4 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu3_pwm4	R/W	0h	AEU3_PWM4 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.23 LED_3_AEU3_PWM_5 Register (Offset = E4h) [Reset = 00h]

LED_3_AEU3_PWM_5 is shown in Figure 2-135 and described in Table 2-162.

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Figure 2-135 LED_3_AEU3_PWM_5 Register

7	6	5	4	3	2	1	0
led_3_aeu3_pwm5
R/W-0h

Table 2-162 LED_3_AEU3_PWM_5 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-0	led_3_aeu3_pwm5	R/W	0h	AEU3_PWM5 setting of LED_3; 0h = 0; 1h = 0.39%; 2h = 0.78%; ... 80h = 50.2%; ... FDh = 99.2%; FEh = 99.6%; FFh = 100%

2.14.24 LED_3_AEU3_T12 Register (Offset = E5h) [Reset = 00h]

LED_3_AEU3_T12 is shown in Figure 2-136 and described in Table 2-163.

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Figure 2-136 LED_3_AEU3_T12 Register

7	6	5	4	3	2	1	0
led_3_aeu3_t2				led_3_aeu3_t1
R/W-0h				R/W-0h

Table 2-163 LED_3_AEU3_T12 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_aeu3_t2	R/W	0h	AEU3_T2 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_aeu3_t1	R/W	0h	AEU3_T1 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.25 LED_3_AEU3_T34 Register (Offset = E6h) [Reset = 00h]

LED_3_AEU3_T34 is shown in Figure 2-137 and described in Table 2-164.

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Figure 2-137 LED_3_AEU3_T34 Register

7	6	5	4	3	2	1	0
led_3_aeu3_t4				led_3_aeu3_t3
R/W-0h				R/W-0h

Table 2-164 LED_3_AEU3_T34 Register Field Descriptions

Bit	Field	Type	Reset	Description
7-4	led_3_aeu3_t4	R/W	0h	AEU3_T4 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;
3-0	led_3_aeu3_t3	R/W	0h	AEU3_T3 slope time setting of LED_3; 0h = no pause time; 1h = 0.09s; 2h = 0.18s; 3h = 0.36s; 4h = 0.54s; 5h = 0.80s; 6h = 1.07s; 7h = 1.52s; 8h = 2.06s; 9h = 2.50s; Ah = 3.04s; Bh = 4.02s; Ch = 5.01s; Dh = 5.99s; Eh = 7.06s; Fh = 8.05s;

2.14.26 LED_3_AEU3_Playback Register (Offset = E7h) [Reset = 00h]

LED_3_AEU3_Playback is shown in Figure 2-138 and described in Table 2-165.

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Figure 2-138 LED_3_AEU3_Playback Register

7	6	5	4	3	2	1	0
RESERVED						led_3_aeu3_pt
R-0h						R/W-0h

Table 2-165 LED_3_AEU3_Playback Register Field Descriptions

Bit	Field	Type	Reset	Description
7-2	RESERVED	R	0h	Reserved
1-0	led_3_aeu3_pt	R/W	0h	AEU3 pattern playback times of LED_3; 0h = 0 time; 1h = 1 time; 2h = 2 times; 3h = Infinite times