SPRADO7 January   2025 AM62D-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Using the Power Estimation Tool
    1. 2.1 Operating Performance Point (OPP)
    2. 2.2 Processor Core Utilization
    3. 2.3 LVCMOS IO
    4. 2.4 Peripherals
    5. 2.5 General
    6. 2.6 Estimated Power Consumption
  6. 3Summary
  7. 4References

2.1 Operating Performance Point (OPP)

This section allows the user to set the operating frequency of each of the compute cores and clusters.

  • A53: Bypass to 1400MHz, depending on PLL resolution frequency step.
    Note: If using 1400MHz, then VDD_CORE must be set to 0.85V, per the data sheet.
  • MCU R5F: Bypass to 800MHz, depending on PLL resolution frequency step.
  • Device Manager R5F: 400 or 800MHz, depending on PLL resolution frequency step.
  • M4F: 400 or 800MHz, depending on PLL resolution frequency step.
  • C7x: Bypass to 1000MHz.
    Note: If using 1000MHz, then VDD_CORE needs to be set to 0.85V, per the data sheet.
  • HSM: 133 or 400MHz