SPRUI64F May 2017 – October 2025
The AM572x IDK EVM design supports two banks of DDR3L SDRAM where each is attached to a separate EMIF on the AM5728 processor. Each EMIF can support up to 2GB at speeds up to 1066MT/s. Each EMIF on the IDK EVM contains two 4Gbit (256M × 16) SDRAMs for a total of 1GB of DDR3L SDRAM memory on each EMIF. The part number for the DDR3L SDRAM memory used is MT41K256M16HA-125 that contains timing for 1600MT/s operation. The package used is the 96-ball TFBGA package. See the AM572x Sitara Processors Technical Reference Manual (SPRUHZ6) for memory locations for this memory.
The first EMIF also contains an SDRAM attached to the ECC byte lane. Use of ECC on the DDR3L interface is currently highly constrained by limitations in the AM572x devices. Refer to the AM574x Sitara Processors Silicon Errata (SPRZ447) for more details.