SPRUIG3C January   2018  – August 2019 TDA4VM , TDA4VM-Q1

 

  1.   Read This First
    1.     About This Manual
    2.     Related Documentation
    3.     Trademarks
  2. 1Overview and Scope
    1. 1.1 Comparing VCOP and C7000
    2. 1.2 About this Document
      1. 1.2.1 Documentation Conventions
    3. 1.3 Output Format
    4. 1.4 Data Types
      1. 1.4.1 40-bit Incompatibilities
      2. 1.4.2 40-Bit Detection in Host Emulation Mode
    5. 1.5 SIMD Width
    6. 1.6 VCOP Virtual Machine
  3. 2Kernel API
    1. 2.1 Overview
    2. 2.2 Parameter Block
      1. 2.2.1 Tvals Structure
      2. 2.2.2 Pblock Manipulation
  4. 3Loop Control
    1. 3.1 Overview
    2. 3.2 Loop Control and Nested Loops
    3. 3.3 Repeat Loops
    4. 3.4 Compound Conditions
    5. 3.5 Early Exit
  5. 4Addressing
    1. 4.1 Overview
    2. 4.2 Streaming Engines
    3. 4.3 Streaming Address Generators
    4. 4.4 Indexed Addressing
    5. 4.5 Circular Addressing
  6. 5Operations
    1. 5.1 Load Operations
    2. 5.2 Store Operations
      1. 5.2.1 Predicated Stores
      2. 5.2.2 Scatter and Transposing Stores
      3. 5.2.3 Optimization of OFFSET_NP1-Based Transpose
      4. 5.2.4 Rounding Stores
      5. 5.2.5 Saturating Stores
    3. 5.3 Arithmetic Operations
      1. 5.3.1 Vector Compares
      2. 5.3.2 Multiplication with Rounding, Truncation, or Left Shift
    4. 5.4 Lookup and Histogram Table Operations
      1. 5.4.1 Determination of Table Size
      2. 5.4.2 Table Configuration
      3. 5.4.3 Copy-in Operation
      4. 5.4.4 Copy-out Operation
      5. 5.4.5 Index Adjustment from Non-zero Agen
      6. 5.4.6 Lookup Operation
      7. 5.4.7 Histogram Update Operation
      8. 5.4.8 16-Way Lookup and Histogram
  7. 6Performance
    1. 6.1 Overview
    2. 6.2 Compiler Requirements
    3. 6.3 Automatic Performance Profiling
    4. 6.4 Performance Options
  8.   A Warnings and Notes
    1.     A.1 Compatibility Warnings
    2.     A.2 Efficiency Warnings

5.4.5 Index Adjustment from Non-zero Agen

The general form of a lookup table operation in VCOP Kernel-C is:

Vdst = base[Agen].lookup(Vindex);

The Agen is added to the base address of the table before adding the index offsets. In typical usage, the Agen remains fixed at zero, and no adjustment is needed. However some kernels may use non-zero or varying Agens as an additional addend to vary the table base dynamically. To account for this, the migration tool adds the offset from the Agen to each lane of the index vector prior to indexing the table. The adjustment calculation is:

Sadj = ((Agen / Ntables) / Elemsz); // scale bytes -> table index
Vindex_adj = Vindex + Sadj; // add to each lane vector

The division by Ntables accounts for the fact that when there are multiple parallel tables, the Agen represents an offset into the combined table data, not an offset into each table. The division by Elemsz accounts for the fact that the Agen is a byte offset, while the index values are element offsets. Both are compile-time constants so the two divisions typically simplify to a single shift instruction. Furthermore, if the Agen does not vary inside the loop, the computation of Sadj can be hoisted outside the loop.

In summary, if the Agen used in a LHT operation varies inside the loop, two additional instructions are required in the loop (shift and add).