SPRUIU9C August 2020 – October 2025 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28P550SG , TMS320F28P550SJ , TMS320F28P559SG-Q1 , TMS320F28P559SJ-Q1
Examples demonstrating the LFU hardware features on F28003x and F28P55x devices are released in the C2000WARE-DIGITALPOWER-SDK and C2000WARE. The software available helps accelerate time to market.
TIDM-02011 demonstrates LFU without device reset leveraging the LFU hardware support on F28003x devices. LFU is illustrated for both the C28x CPU and the Control Law Accelerator (CLA), and is implemented in the C2000™ Digital Power Buck Converter BoosterPack reference design. The TIDM-02011 Design Guide details the LFU capabilities with the main control loop running on either the C28x CPU or the CLA.
TIDA-010062 also demonstrates LFU without device reset on F28003x devices. This example displays the LFU capabilities on the LLC stage with the main control loop running on the CLA and background processes running on the C28x CPU. The TIDA-010062 Design Guide details how LFU is implemented in the reference design.
Two example applications were developed to demonstrate the LFU hardware features on F28P55x devices. LFU has been implemented for the C28x CPU, the Control Law Accelerator (CLA), and Neural Processing Unit (NPU). Note that the CPU and CLA have independent applications due to application use-case; either the CPU or CLA are controlling blinking LEDs.
The following examples can be found in C2000Ware (C2000Ware_x_xx_xx_xx\driverlib\f28p55x\examples\flash):
To demonstrate LFU for the NPU, the LFU_BANK0_NPU/LFU_BANK1_NPU build configurations (which adds the RUNNING_ON_NPU pre-defined symbol) are included in both the CPU and CLA applications. The arc fault detect model and the associated test vectors (generated from Model Composer) are executed by the NPU to compare to golden output before the background loop is executed. Note that a reset is necessary to properly initialize the NPU when adding NPU support to the application for the first time.