Details:

During OSPI boot mode, including fallback modes that would result in OSPI boot mode, ROM configures pin GPIO61 as OSPI0_RESET_OUT0. If this pin is connected to the Reset pin of the OSPI Flash Memory, boot failures may occur due to a reset signal management issue in the OSPI controller.

During OSPI boot mode, the ROM code:

1. Configures GPIO61 in OSPI0_RESET_OUT0 mux mode
2. Correctly asserts the reset signal (drives low)
3. Fails to de-assert the reset signal due to incorrect OSPI controller configuration (GPIO61 pin remains driven low)

If GPIO61 is connected to the Flash Memory Reset pin, the flash device remains in reset state. This prevents proper boot sequence completion. This issue affects all package types where GPIO61 is utilized for OSPI Flash reset control. In addition, GPIO61 will remain low until user application reconfigures it.

Workaround(s):

Option 1: None. Do not use GPIO61 pin.

Option 2: User application code can reconfigure this pin in case this pin needs to be utilized. But if the application is glitch sensitive, ensure that the glitch does not affect connected peripherals by including appropriate filtering in external circuitry.