7 Register Map

The ADC810-Q1 has ten registers that are accessible through the I²C interface using the Address Pointer register. The ADC Conversion register contains the result of the last conversion. The ADC Configuration register is used to change the ADC810-Q1 operating modes and query the ADC status. The ADC Comp Low_Thresh Register and High_Thresh Register set the threshold values used for the comparator function. The I/O Input Port register reflects the incoming logic levels of the pins. The I/O Output Port Register displays the outgoing logic levels of the pins defined as outputs by the I/O Direction Register, provided the pin has enabled digital functionality. The I/O Polarity Inversion Register enables the inversion of polarity for pins designated as digital inputs by the I/O Direction Register. The I/O Direction register configures the direction of the I/O pins and determines whether a pin enables digital or analog functionality. The Pin Function Register selects the functionality of the I/Os, determining whether the pins are analog or digital, and controls the Alert pins to be either an I/O or an alert. Finally, the Device Status Register contains the state in which the device is currently operating.

Table 7-1 lists the access codes for the ADC810-Q1 registers.

Address Pointer Register (address = N/A) [reset = N/A]

All nine registers are accessed by writing to the Address Pointer register.

ADC Conversion Register (P[1:0] = 00b) [reset = 0000h]

The 16-bit ADC Conversion register contains the result of the last conversion in binary two's-complement format (can be changed to unsigned format through the DATA_FORMAT bit in the Pin Configuration register). Following power-up, the ADC Conversion register is cleared to 0000h and remains 0000h until the first conversion completes.

ADC Configuration Register (P[1:0] = 01b) [reset = C183h]

The 16-bit ADC Configuration register is used to control the operating mode, channel selection, data rate, voltage reference configuration, and comparator modes. Note: Only one ADC Channel can be used at a time

ADC Low_thresh (P[1:0] = 10b) [reset = 8000h] and ADC High_thresh (P[1:0] = 11b) [reset = 7FFFh] Registers

The ADC Comparator high and low threshold values used by the comparator are stored in two 16-bit registers in two's-complement format(can be changed in the Pin Configuration register. The user must write the right values depending on the format the ADC results are currently in.) The comparator is implemented as a digital comparator.

The conversion-ready function of the ALERT/RDY pin is enabled by setting the High_thresh register MSB to 1b and the Low_thresh register MSB to 0b. To use the comparator function of the ALERT/RDY pin, the High_thresh register value must always be greater than the Low_thresh register value. The threshold register formats are shown in ADC Low_thresh register. When set to RDY mode, the ALERT/RDY pin outputs the OS bit when in single-shot mode, and provides a continuous-conversion ready pulse when in continuous-conversion mode.

I/O Input Port (P[3:0] = 0100b) [reset = 0000h] Register

The I/O Input Port Register reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an analog or digital pin by the Pin Function Register, or as a digital input or a digital output by the I/O Direction Register. They act only on read operation. Writes to this register have no effect. The default value is determined by the externally applied logic level. Before a read operation, a write transmission is sent with the command byte to indicate to the I2C device that the Input Port Register will be accessed next. The MSB bit from IN_READ controls I/O_9, and then it goes bellow until the LSB bit, which control I/O_0.

I/O Output Port (P[3:0] = 0101b) [reset = 03FFh] Register

The I/O Output Setting Register shows the outgoing logic levels of the pins defined as outputs by the I/O Direction Register. If a bit is set (1) in any of the OUT_LEVEL bits, the output value for that I/O assigned to the bit will be high; if a bit is clear (0), the output value will be low. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value. If the I/O is not enabled as a digital input, the placeholder value for that I/O that is currently not a digital IO input will be the previous IO value it registered before the direction change from input to output, and the IO value will not be affected by this register.

I/O Polarity Inversion (P[3:0] = 0110b) [reset = 0000h] Register

The Polarity Inversion Register allows polarity inversion of pins defined as inputs by the I/O Direction Register. If the I/O bit in the register is not set to be an input, this register won't affect that I/O bit. If a bit in this register is set (written with 1), the polarity of the corresponding port pin is inverted. If a bit in this register is cleared (written with a 0), the original polarity of the corresponding port pin is retained.

I/O Direction (P[3:0] = 0111b) [reset = 00FFh] Register

The I/O Direction Register configures the direction of the I/O pins. If any CONFIG_IO bits in this register are set to 1, the corresponding port pin is enabled as an input I/O. If any CONFIG_IO bits in this register are cleared to 0, the corresponding port pin is enabled as a output I/O. If the Alert pins are not set to I/O_8 and I/O_9 i.e., the Alert pins are not configured as digital I/Os, then this register doesn’t affect these pins.

Pin Function(P[3:0] = 1000b) [reset = 07FFh] Register

The Pin Function register selects the functionality of the I/Os in the device from I/O_0 to I/0_9. The lower byte controls whether any of the pins in I/O_7 to I/O_0 are selected as digital or analog pins. If a bit in the lower byte is set to 1, the pin will be an Analog pin; if it is set to 0, then the pin will be a Digital pin. Additionally, if any of the AL_CONFIG pins are set to 0, then the pin is configured as a digital input; otherwise, it is set to its respective Alert pin. If a pin is configured as an Analog pin, the INT Alert pin won't recognize any "change" in the input going to that pin. Finally, the Data_Format bit decides whether the data collected from the ADC is set to be two's complement (if the bit is set to 1) or unsigned (if the bit is set to 0)

Device Status (P[3:0] = 1001b) [reset = 0011h] Register

The 16-bit Device Status register contains the most recent status of the device at the time of reading. The status register is cleared to its default value once the user reads from it.