Abstract

Wire bonded chip-on-lead QFN packages require a minimum amount of support of the die on the lead frame to maintain stable processing at wire bond. However, as die shrink with improved silicon capability, supporting smaller die sizes in existing package footprints has become more challenging. One support option is to extend the exposed metal of leads on the lead frame. However, the implications of this type of footprint change have not been evaluated for compatibility with existing PCBs. Therefore, this study assesses the potential impact on solder joint quality and reliability when leads overhang the land pads on a PCB in the SMT process.

During this study, a test vehicle was selected for the design of PCBs which simulate varying levels of lead overhang, and a representative sample of units were soldered onto each board. Measurements of the solder joint thickness were taken before subjecting the units to temperature cycling board-level reliability testing. Results show that up to 200µm of lead overhang can be supported with adequate solder joint formation, without concern on board-level performance. This adjustment can also allow for maintaining the same package designator in chip-on-lead QFN packages, which is important for customer continuity.