SWPA230A May   2017  – June 2018 CC3120 , CC3120MOD , CC3220MOD , CC3220MODA , CC3220R , CC3220S , CC3220SF

 

  1.   CC3120 and CC3220 SimpleLink™ Wi-Fi® Embedded Programming
    1.     Trademarks
    2. 1 Introduction
    3. 2 Embedded Programming Schemes
    4. 3 Setup
    5. 4 Bootloader Protocol
      1. 4.1 Overview
      2. 4.2 General Message Format
      3. 4.3 Commands
        1. 4.3.1 Get Status
        2. 4.3.2 Get Storage List
        3. 4.3.3 Raw Storage Write
        4. 4.3.4 Get Version Info
        5. 4.3.5 Raw Storage Erase
        6. 4.3.6 Get Storage Info
        7. 4.3.7 Execute from RAM
        8. 4.3.8 Switch UART to APPS MCU
        9. 4.3.9 FS Programming
      4. 4.4 Responses
        1. 4.4.1 Ack
        2. 4.4.2 Nack
        3. 4.4.3 Last Status
        4. 4.4.4 Storage List
        5. 4.4.5 Storage Info
        6. 4.4.6 Version Info
    6. 5 Embedded Programming Procedure
      1. 5.1 Overview
      2. 5.2 High-Level Flow Diagram
      3. 5.3 Image Programming in Detail
        1. 5.3.1  Step 1: Target Connection
        2. 5.3.2  Step 2: Target Detection
        3. 5.3.3  Step 3: MUX UART to the Network Processor
        4. 5.3.4  Step 4: Get SRAM Storage Info
        5. 5.3.5  Step 5: Raw Storage Erase – SRAM
        6. 5.3.6  Step 6: Raw Storage Write – SRAM
        7. 5.3.7  Step 7: Execute from RAM
        8. 5.3.8  Step 8: Get SFLASH Storage Info
        9. 5.3.9  Step 9: Raw Storage Erase – SFLASH
        10. 5.3.10 Step 10: Raw Storage Write – SFLASH
        11. 5.3.11 Step 11: FS Programming
        12. 5.3.12 Step 12: Device Reset
  2.   Revision History

Step 6: Raw Storage Write – SRAM

Programming the patches to the SRAM is applied in chunks. The chunk size is 4096 bytes but the maximal size that can be programmed is 4080 bytes. Thus, the buffer is programmed in actual chunks of 4080 bytes. The procedure for programming the SRAM follows:

  1. The main processor sends the Raw Storage Write command in chunks of 4080 bytes. The user should provide the storage ID for SRAM, offset in bytes and number of bytes to program. The offset in SRAM is 0 (beginning of SRAM).
  2. The CC3120 or CC3220 device responds with an Ack.
  3. The main processor sends the Get Status command.
  4. The CC3120 or CC3220 device responds with an Ack followed by the Last Status response. Only the fourth byte should be inspected; 0x40 means success whereas other values indicate error.
  5. The main processor sends an Ack response.
  6. Steps 1-5 repeat if the data is larger than chunk size.

Figure 9 shows the SRAM programming procedure in a zoomed-out pane. As observed, the procedure is divided into three separate programming instances.

raw-storage-write-SRAM.gifFigure 9. Raw Storage Write to SRAM (Zoomed Out)

Figure 10 shows the SRAM programming procedure in a zoomed-in pane to the second chunk. As observed, the chunk is 4080 bytes in offset 4080.

raw-storage-write-zoom-in-SRAM.gifFigure 10. Raw Storage Write to SRAM (Zoomed In)