SWRS359 September   2026 CC1402P

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Power Consumption (Power Modes)
    5. 6.5  Power Consumption (Radio Modes)
    6. 6.6  RF Frequency Bands
    7. 6.7  Reset Timing
    8. 6.8  Temperature Sensor
    9. 6.9  Battery Monitor
    10. 6.10 GPIO DC Characteristics
    11. 6.11 SPI Characteristics
    12. 6.12 DC/DC
    13. 6.13 48MHz Crystal Oscillator (HFXT)
    14. 6.14 48MHz Clock Input (TCXO)
    15. 6.15 32kHz RC Oscillator (LFOSC)
    16. 6.16 782MHz - 957MHz Receive (RX)
    17. 6.17 782 MHz - 957 MHz Transmit (TX)
    18. 6.18 RF PLL Phase Noise and Spurious
  8. 7 Detailed Description
    1. 7.1 Radio (RF Core)
    2. 7.2 Memory
    3. 7.3 Battery and Temperature Monitor
    4. 7.4 Proprietary Radio Form
    5. 7.5 Power Management
  9. 8 Application, Implementation, and Layout
    1. 8.1 Reference Designs
      1. 8.1.1 Highest Performance
      2. 8.1.2 Balanced Performance
      3. 8.1.3 Lowest external Bill of Material (eBOM)
      4. 8.1.4 Long Range low external Bill of Material
      5. 8.1.5 Antenna Kit for LaunchPad
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Tools and Software
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Documentation Support
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Export Control Notice
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information

5 Pin Configuration and Functions

CC1402P RKP (5mm × 5mm) Pinout, 0.4mm Pitch (Top View)Figure 5-1 RKP (5mm × 5mm) Pinout, 0.4mm Pitch (Top View)
Table 5-1 Pin Functions
PINI/OTYPEDESCRIPTION
NAMENO.
RF_N

39

I/O

 RF Analog Differential TX/RX Port

RF_P

38

I/O

 RF Analog Differential TX/RX Port
PA_P

7

O

 RF Analog Differential TX output
PA_N

6

O

 RF Analog Differential TX output

ULNA_IN

3

I

RF

Analog Single ended port

ULNA_OUT

2

O

RF

Analog Single ended port

RXTX

1

O

RF

 Optional bias pin for the RF LNA

DIO0 (ADC)

10

 I/O Digital Digital GPIO

DIO1 (INT)

12

 I/O Digital Digital GPIO (SPI Interrupt signal)
DIO2

18

 I/O Digital Digital GPIO
DIO3

19

 I/O Digital Digital GPIO
DIO4

22

 I/O Digital Digital GPIO
DIO5

23

 I/O Digital Digital GPIO
DIO6

24

 I/O Digital Digital GPIO
DIO7 26 I/O Digital Digital GPIO
CSN

15

 I Digital SPI active-low chip select
SCLK

14

 I Digital SPI clock
PICO

17

 I Digital SPI data in
POCI

16

 O Digital SPI data out

NC

33

—

—

No Connect
EGP — — GND Ground – exposed ground pad
RSTN

25

 I Digital Reset, active low. No internal pullup resistor

DCDC_SW

29

 — Power

Output from internal DC/DC converter

VDDR

32

 — Power

Internal supply, must be powered from internal DC/DC or LDO
VDDS_RF

8, 36

 — Power Must be connected to VDDS
VDDR_RF

5,37

 — Power Internal supply, must be powered from internal DC/DC or LDO
VDDD

27

 — Power

For decoupling of internal supply
VDDS

13, 21

 — Power

Main device supply

VDDS_DCDC

30

 — Power

Supply for DC/DC converter
X48P

34

 — Analog 48MHz crystal oscillator pin P
X48N

35

 — Analog 48MHz crystal oscillator pin N

ULNA_GND

4

—

Power

ULNA Ground

DCDC_GND

28

 — Power

DCDC Ground

RFGND

40

 — Power RF Ground

GND

 9,11,20,31 — Power

Ground