SWRS359 September   2026 CC1402P

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Power Consumption (Power Modes)
    5. 6.5  Power Consumption (Radio Modes)
    6. 6.6  RF Frequency Bands
    7. 6.7  Reset Timing
    8. 6.8  Temperature Sensor
    9. 6.9  Battery Monitor
    10. 6.10 GPIO DC Characteristics
    11. 6.11 SPI Characteristics
    12. 6.12 DC/DC
    13. 6.13 48MHz Crystal Oscillator (HFXT)
    14. 6.14 48MHz Clock Input (TCXO)
    15. 6.15 32kHz RC Oscillator (LFOSC)
    16. 6.16 782MHz - 957MHz Receive (RX)
    17. 6.17 782 MHz - 957 MHz Transmit (TX)
    18. 6.18 RF PLL Phase Noise and Spurious
  8. 7 Detailed Description
    1. 7.1 Radio (RF Core)
    2. 7.2 Memory
    3. 7.3 Battery and Temperature Monitor
    4. 7.4 Proprietary Radio Form
    5. 7.5 Power Management
  9. 8 Application, Implementation, and Layout
    1. 8.1 Reference Designs
      1. 8.1.1 Highest Performance
      2. 8.1.2 Balanced Performance
      3. 8.1.3 Lowest external Bill of Material (eBOM)
      4. 8.1.4 Long Range low external Bill of Material
      5. 8.1.5 Antenna Kit for LaunchPad
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Tools and Software
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Documentation Support
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Export Control Notice
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information

7.5 Power Management

To minimize power consumption, the CC1402P supports a number of power modes and power management features (see Table 7-2).

Table 7-2 Power Modes
MODE POWER MODES RESET PIN HELD
ACTIVE IDLE STANDBY SHUTDOWN
SRAM On On Retention Off Off
Radio Available Available Off Off Off
Supply System On On Duty Cycled Off Off
Register and CPU retention Full Full Partial No No
SRAM retention Full Full Full No No
48MHz high-speed clock

HFOSC

 HFOSC Off Off Off
32kHz low-speed clock LFOSC LFOSC LFOSC Off Off
Wake-up on RTC Available Available Available Off Off
Wake-up on pin edge Available Available Available Available Off
Wake-up on reset pin On On On On On
Brownout detector (BOD) On On Duty Cycled Off Off
Power-on reset (POR) On On On On On
Watchdog timer (WDT) Available Available Paused Off Off

In Active mode, the transceiver system CPU is actively executing code. Active mode provides normal operation of all of the peripherals and radio subsystem.

In Standby mode, the transceiver is waiting for an external wake-up event or an RTC event to bring the device back to active mode.

In Shutdown mode, the device is entirely turned off, and the I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger.