TIDA032A October   2019  – November 2026

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
    2. 1.2 Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Input Power
        1. 2.2.1.1 Vpwr
        2. 2.2.1.2 3.3V
        3. 2.2.1.3 3.3V_ISO
      2. 2.2.2 Communication Interface
        1. 2.2.2.1 PSE I2C Communication
        2. 2.2.2.2 MCU - Host Communication
      3. 2.2.3 MSP430F523x and MSPM0G1107x Hardware Design
    3. 2.3 Highlighted Products
      1. 2.3.1  TPS23882 and TPS23882B
      2. 2.3.2  MSPM0G1107x and MSP430F523x
      3. 2.3.3  ISO7741
      4. 2.3.4  ISO7731
      5. 2.3.5  CSD19538
      6. 2.3.6  LM5017
      7. 2.3.7  LM5020
      8. 2.3.8  LM5050
      9. 2.3.9  INA240
      10. 2.3.10 REF3425
      11. 2.3.11 TPS3890
  9. 3Hardware, Software, Testing Requirement and Test Result
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Testing and Results
      1. 3.2.1 Test Setup
        1. 3.2.1.1 Hardware Setup
        2. 3.2.1.2 LED, Test Point, Jumper, and Connector Settings
          1. 3.2.1.2.1 EVM LEDs
          2. 3.2.1.2.2 EVM Test Points
          3. 3.2.1.2.3 EVM Jumpers
          4. 3.2.1.2.4 EVM Input and Output Connectors
        3. 3.2.1.3 System Firmware GUI Setup
          1. 3.2.1.3.1 PSE System Firmware GUI Installation
          2. 3.2.1.3.2 PSE System Firmware GUI Operation
      2. 3.2.2 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematic
      2. 4.1.2 Bill of Materials
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
      4. 4.1.4 Altium Project
      5. 4.1.5 Gerber Files
      6. 4.1.6 Assembly Drawings
      7. 4.1.7 Software Files
  11. 5Related Documentation
    1. 5.1 Trademarks
  12. 6Revision History

2.2.3 MSP430F523x and MSPM0G1107x Hardware Design

Table 2-1 MSP430 GPIO Pin Assignment
PIN NUMBER MSP430F5234 (48RGZ) TERMINAL FUNCTION COMMENT
COMMUNICATION
22 P3.0 I2C SDA USCI_B0 I2C to PSEs
23 P3.1 I2C SCL USCI_B0 I2C to PSEs
30 P4.1 I2C SDA USCI_B1 I2C to host
31 P4.2 I2C SCL USCI_B1 I2C to host
33 P4.4 UART TX USCI_A1 UART to host (debug only)
34 P4.5 UART RX USCI_A1 UART to host (debug only)
21 P2.7 SPI CLK USCI_A0 SPI to host (reserved)
24 P3.2 SPI peripheral TX enable, USCI_A0 SPI to host (reserved)
25 P3.3 UART TX,USCI_A0 or SPI peripheral in, controller out UART to host TX or SPI to host (reserved)
26 P3.4 UART RX, USCI_A0 or SPI peripheral out, controller in UART to host RX or SPI to host (reserved)
HARDWARE INTERRUPT
13 P1.0 PSE INT Connect to PSE INT pin
16 P1.3 OC Alert Connect to external current sensing circuit if not used, connect to 3.3V
18 P1.5 Power supply 1 Connect to power supply 1 power good signal. In RPS mode, P1.5 must be connected to main power supply. If there is only one power supply, the power good signal must be connected to P1.5.
19 P1.6 Power supply 2 Connect to power supply 2 power good signal, if not used, connect to GND. In RPS mode, P1.6 must be connected to backup power supply
20 P1.7 Disable all ports This is for hardware disable ports(Reserved)
GENERAL I/O
4 P5.0 RESET PSE RESET Connect to PSE RESET pin
17 P1.4 OSS PSE OSS Connect to PSE OSS pin
46 P6.0 Interrupt pin to host
35 P4.6 BSL mode indication to host MCU configures as output. If MCU is in BSL mode, output high. If in normal operation mode, output low.
48 P6.2 Guard-band indication Need an external LED
47 P6.1 Selection between I2C and SPI/UART (Need to pullup or pulldown)
PROGRAM DOWNLOAD AND DEBUG
44 PJ.3 TCK JTAG clock input
43 PJ.2 TMS JTAG state control
42 PJ.1 TDI/TCLK JTAG data input, TCLK input
41 PJ.0 TDO JTAG data output
40 TEST/SBWTCK Enable JTAG pins
45 RSTDVCC/SBWTDIO External reset
EXTERNAL CRYSTAL
7 P5.4 XTIN External low frequency clock (use if needed)
8 P5.5 XTOUT External low frequency clock (use if needed)

Pre-configure the host interface protocol through hardware as shown in Table 2-2.

Table 2-2 Host Interface Protocol (MSP430)
P6.1 CS(P3.2)
I2C high Don’t care
UART low low
SPI (Reserved) low high

Table 2-3 shows the MSPM0 GPIO pin assignments:

Table 2-3 MSPM0 GPIO Pin Assignments
PIN NUMBER MSPM0G1107 (48RGZ) TERMINAL FUNCTION COMMENT
COMMUNICATION
31 PA16 I2C SDA controller I2C1_SDA
30 PA15 I2C SCL controller I2C1_SCL
1 PA0 I2C SDA peripheral I2C0_SDA
2 PA1 I2C SCL peripheral I2C0_SCL
18 PA10 UART TX (Comm and BSL)

UART0 transmit to host (reserved),

Bootstrap loader
19 PA11 UART RX (Comm and BSL)

UART0 receive to host (reserved),

Bootstrap loader
29 PA14 UART TX (Debug) UART3 TX Debug
28 PA13 UART RX (Debug) UART3 RX Debug
23 PB9 SPI CLK SPI1 clock signal I/O
20 PB6 SPI peripheral TX enable SPI1 chip-select 0
24 PB14 SPI peripheral in/controller out SPI1 POCI
25 PB15 SPI peripheral out/controller in SPI1 PICO
HARDWARE INTERRUPT
13 PA7 PSE INT Connect to PSE INT pin
16 PA18 OC Alert Connect to external current sensing circuit if not used, connect to 3.3V
21 PB7 Power supply 1 Connect to power supply 1 power good signal. In RPS mode, PB7 must be connected to main power supply. If there is only one power supply, the power good signal must be connected to PB7.
22 PB8 Power supply 2 Connect to power supply 2 power good signal, if not used, connect to GND. In RPS mode, PB8 must be connected to backup power supply
17 PA9 Disable all ports This is for hardware disable ports (reserved)
32 PA17 I2C Reset Connect to host GPIO pin to reset I2C module when host I2C fails.
GENERAL I/O
14 PB2 RESET PSE RESET Connect to PSE RESET pin
15 PB3 OSS PSE OSS Connect to PSE OSS pin
46 PA26 Interrupt pin to host
36 PB17 BSL mode indication to host MCU configures as output. If MCU is in BSL mode, output high. If in normal operation mode, output low.
33 PA18 BSL Invoke Input pin used to invoke bootloader
45 P6A25 Guard-band indication Need an external LED
47 PA27 Selection between I2C and SPI, UART Need to pullup or pulldown
PROGRAM DOWNLOAD AND DEBUG
35 PA20 SWCLK Serial wire debug input clock
34 PA19 SWDIO Serial wire debug I/O
EXTERNAL CRYSTAL AND POWER
9 PA3 XTIN External low frequency clock (use if needed)
10 PA4 XTOUT External low frequency clock (use if needed)
11 PA5 HFXIN Extra high frequency clock
12 PA6 HFXOUT Extra high frequency clock
8 ROSC Output for high frequency HFXT
7 VSS M0+ Ground Supply Refer to MSPM0 datasheet for schematic requirements
6 VDD M0+ Power Supply Refer to MSPM0 datasheet for schematic requirements
48 VCORE M0+ Regulated core power supply output Refer to MSPM0 datasheet for schematic requirements

Pre-configure the host interface protocol through hardware as shown in Table 2-4.

Table 2-4 Host Interface Protocol (MSPM0)
PA27 CS (PB6)
I2C high Don’t care
UART low low
SPI (CS ActiveLow) low high