TIDUEZ0A March   2021  – March 2022 TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Three-Phase ANPC Inverter Architecture Overview
      2. 2.2.2 LCL Filter Design
      3. 2.2.3 Power Switching Devices Selection
      4. 2.2.4 GaN Power Stage
      5. 2.2.5 Voltage Sensing
      6. 2.2.6 Current Sensing
      7. 2.2.7 System Power Supplies
        1. 2.2.7.1 Isolated Bias Supplies
      8. 2.2.8 Si Gate Driver Circuit
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware and Software Requirements
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Testing TIDA-010210 With AC Resistive Load
      1. 3.2.1 Test Setup
      2. 3.2.2 Experimental Results
    3. 3.3 Testing TIDA-010210 in PFC Operation
      1. 3.3.1 Test Setup
      2. 3.3.2 Experimental Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Altium Project
      4. 4.1.4 Gerber Files
      5. 4.1.5 Assembly Drawings
    2. 4.2 Tools and Software
    3. 4.3 Support Resources
    4. 4.4 Trademarks
  10. 5About the Authors
  11. 6Revision History

Three-Phase ANPC Inverter Architecture Overview

The basic architecture of the ANPC topology is shown in Figure 2-2.

GUID-20210302-CA0I-BQCS-NT0R-Z1BV0LFLW1PD-low.gifFigure 2-2 ANPC Three-Phase Inverter Architecture

To simplify the analysis, a single leg can be separated out as shown in Figure 2-3.

GUID-20210302-CA0I-L2BJ-MHFV-ZNW88ZWFCMR4-low.gifFigure 2-3 ANPC Single-Phase Inverter Leg

As can be seen, there are six switches in each phase. Though there can be various switching schemes to control this power stage, we selected a relatively simpler scheme to reduce complexity. The upper half of the circuit consisting of Q1, Q5 and Q2 is active during the positive half cycle and the lower half consisting of Q4, Q6 and Q3 is active during the negative half cycle. Q2 and Q3 are slow switches that connect the inductor to either the upper high frequency switching pair of Q1 & Q5 or Q4 & Q6 during positive and negative half cycles respectively. Each of the high frequency switching pairs is operated as a synchronous buck converter during their corresponding half cycles. The switching scheme is explained in detail in Figure 2-4 and Figure 2-5.

GUID-20210302-CA0I-NBTT-FBGP-XGK89LGLFSRQ-low.gifFigure 2-4 Inductor connected to V+
GUID-20210302-CA0I-69JV-0VXS-N3ZBJ0JSRKZB-low.gifFigure 2-5 Inductor connected to N (+ve)

Figure 2-4 and Figure 2-5 show the operation of the circuit during the positive half cycle of this phase. The components in red are the ones that are conducting and those in black are the ones that are off. As can be seen Q2 remains on for the entire half cycle. When Q1 is on, the circuit is in active mode, establishing current flow from V+ to the inductor as in Figure 2-4. Since both Q1 and Q2 are on, the switching node of the inductor is connected to V+. Now, the switches Q3 and Q4 together have to withstand the full bus voltage. To avoid unequal distribution of the bus voltage among these devices (due to unequal device parasitics), Q6 also is kept on so that the central node gets connected to neutral, dividing the voltage equally between Q3 and Q4. When Q1 and Q6 are turned off together during the dead-time between the states shown in Figure 2-4 and Figure 2-5, the inductor current can only flow through the body diode of Q5 and Q2 (which stays on). During the freewheeling mode shown in Figure 2-5, Q5 acts as a synchronous diode, connecting the switching node of the inductor to neutral. Since the switches Q3 and Q4 have only half the bus voltage across them, it is not necessary to keep Q6 on for voltage balancing.

GUID-20210302-CA0I-TTPW-LKQ7-LF1SPCFVPBQG-low.gifFigure 2-6 Inductor connected to V-
GUID-20210302-CA0I-1VJM-WG1F-CGD8B5356TFR-low.gifFigure 2-7 Inductor connected to N (-ve)

Similar to the operation during the positive half cycle, Figure 2-6 and Figure 2-7 illustrate the operation of the ANPC power stage during the negative half cycle. Q3 remains on for the entire duration of the negative half cycle.

Figure 2-6 shows the active mode operation in which the inductor gets connected to V- through Q4 and Q3. Similar to the operation during positive half cycle, Q5 also is kept on in this active mode operation to balance the voltage stress between Q1 and Q2. In freewheeling mode shown in Figure 2-7, the inductor current is maintained through Q6 and Q3, connecting the inductor switch node to neutral.