TIDUFE0A June   2025  – October 2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 mmWave Radar Sensor Application
      2. 2.2.2 IWRL6432AOP UART Communication
      3. 2.2.3 Wireless Communication
      4. 2.2.4 Power Supply Design
      5. 2.2.5 IWRL6432AOP Power Supply Considerations
      6. 2.2.6 IWRL6432AOP Fan Out
      7. 2.2.7 Radome Design and Simulations
      8. 2.2.8 Cost Optimization Techniques
      9. 2.2.9 Comparison Between TIDA-010967 and IWRL6432AOPEVM
    3. 2.3 Highlighted Products
      1. 2.3.1 IWRL6432AOP
      2. 2.3.2 TPS628502
      3. 2.3.3 TPS2116
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Getting Started Hardware
        1. 3.1.1.1 Design Module Initialization: IWRL6432AOP Programming
    2. 3.2 Software Requirements
    3. 3.3 Test Setup
      1. 3.3.1 Motion and Presence Detection Demonstration Setup
      2. 3.3.2 Bluetooth® LE Communication Demonstration Setup
    4. 3.4 Test Results
      1. 3.4.1 Motion and Presence Detection Demonstration Test Result
      2. 3.4.2 Bluetooth® LE Communication Demonstration Test Result
      3. 3.4.3 Power Consumption Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.2.6 IWRL6432AOP Fan Out

The key power and digital interface signals are carefully routed out from the IWRL6432AOP BGA package, primarily utilizing free space near the horizontal edges and the center of the device. The absence of via-in-pad simplifies manufacturing processes and reduces PCB cost, yielding a significant cost benefit for two-layer boards.

Designing signals on a two-layer PCB poses significant challenges due to tight constraints, necessitating proper design considerations and careful routing. To preserve the Field of View (FOV) of the antenna, designers must exercise extra caution when placing tall components within the restricted radius of the IWRL6432AOP keepout area. Conversely, the BGA pads along the horizontal edges of the IWRL6432AOP facilitate efficient packing of the center and north section and south section of the package. Figure 2-7 illustrates an exemplary implementation of fan out.

TIDA-010967 TIDA-010967: IWRL6432AOP Fan Out Figure 2-7 TIDA-010967: IWRL6432AOP Fan Out