SLAAE84 March   2023 MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1

 

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Description

The DMA Ping Pong with ADC example demonstrates how to use the DMA to transfer ADC data between two different buffers, also known as a DMA "Ping Pong". A DMA Ping Pong is commonly used to transfer data to one buffer while the CPU is working with the other buffer. As shown in #GUID-A45EB6DC-89BB-4D62-AA7C-75E01A416B61, the blue path shows the DMA transfers data to Buffer 1 and the CPU gets data from Buffer 2. When the paths switch, the DMA transfers data to Buffer 2 and the CPU gets data from Buffer 1. The benefit to this technique is faster total application runtime because the CPU is free to operate on a section of data at all times. In this example, the ADC is configured in single conversion mode and the DMA and CPU will switch between buffers after each conversion. Download the code for the DMA Ping Pong example.

Figure 1-1 Subsystem Functional Block Diagram

Required Peripherals

This application requires the integrated ADC and DMA. The internal VREF is an additional option for the ADC reference, if a different reference value is required.

Table 1-1
Sub-block Functionalilty Peripheral Use Notes
Analog Signal Capture ADC Called ADC12_0_INST in code
Moving memory DMA Full featured DMA channel is required to utilize the PREIRQ functionality. The example can be altered to work without the PREIRQ.

Compatible Devices

Based on the requirements in Table 1-1, the compatible devices are listed in Table 1-2. The corresponding EVM can be used for quick evaluation.

Table 1-2
Compatible Devices EVM
MSPM0Lx LP-MSPM0L1306
MSPM0Gx LP-MSPM0G3507

Design Steps

  1. Determine the configuration for the ADC including reference source, reference value, resolution, and sampling rate based on the given analog input and design requirements.
  2. Generate 2 array buffers to store the ADC data and set the buffer size and DMA transfer size the same so the DMA fills the whole buffer.
  3. Configure the ADC in SysConfig based on the project requirements discovered in Step 1.
  4. Configure the DMA in SysConfig in the ADC section.
  5. Write Application Code to dynamically change the destination address of the DMA to alternate between buffers. See the #GUID-ACDA24BA-0672-443A-B753-5A745C168436 for an overview or view the code directly.

Design Considerations

  1. Maximum Sampling Speed: The sampling speed of the ADC is based on input signal frequency, analog front end, filters, or any other design parameters that affect sampling.
  2. ADC Reference: Choose the reference to align with the expected maximum input to utilize the full scale range of the ADC.
  3. Clock Settings: The clock source determines the total time for the conversion. The clock divider in tandem with the SCOMP setting determines the total sampling time. SysConfig sets the appropriate SCOMP depending on the sampling time setting.

Software Flowchart

Figure 1-2 Application Software Flowchart

Design Results

Below are the results of the code executing. #GUID-BD943601-7535-42E3-B335-2768FA662317 shows the results of the first buffer after the ADC readings complete. After this point the code will swap the DMA destination to the second buffer and the CPU will now be free to act on the first buffer.

GUID-20230224-SS0I-FRBP-CS4T-CDB3GLFCSTTW-low.png Figure 1-3 First Buffer Filled by the DMA

#GUID-7848181A-92A9-4542-8D81-885CBD0B0172 shows the results of the second buffer after the ADC readings complete. The code swaps the DMA destination back to the first buffer and now the CPU can execute on the second buffer.

GUID-20230216-SS0I-NRV9-9B0G-VWRFKXVSCZ3T-low.png Figure 1-4 Second Buffer Filled by the DMA