Product details

Sample rate (Max) (MSPS) 62 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 300 Features High Performance Rating Catalog Input range (Vp-p) 2, 4 Power consumption (Typ) (mW) 1200 Architecture Pipeline SNR (dB) 73 ENOB (Bits) 11.7 SFDR (dB) 85 Operating temperature range (C) -40 to 85 Input buffer No
Sample rate (Max) (MSPS) 62 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 300 Features High Performance Rating Catalog Input range (Vp-p) 2, 4 Power consumption (Typ) (mW) 1200 Architecture Pipeline SNR (dB) 73 ENOB (Bits) 11.7 SFDR (dB) 85 Operating temperature range (C) -40 to 85 Input buffer No
LQFP (PM) 64 100 mm² 10 x 10
  • HIGH DYNAMIC RANGE:
         High SFDR: 85dB at 10MHz fIN
         High SNR: 72dB at 10MHz fIN
  • ON-BOARD TRACK-AND-HOLD:
         Differential Inputs
         Selectable Full-Scale Input Range
  • FLEXIBLE CLOCKING:
         Differential or Single-Ended
         Accepts Sine or Square Wave Clocking Down to 0.5VPP
         Variable Threshold Level
  • APPLICATIONS
    • COMMUNICATIONS RECEIVERS
    • TEST INSTRUMENTATION
    • CCD IMAGING

All trademarks are the property of their respective owners.

  • HIGH DYNAMIC RANGE:
         High SFDR: 85dB at 10MHz fIN
         High SNR: 72dB at 10MHz fIN
  • ON-BOARD TRACK-AND-HOLD:
         Differential Inputs
         Selectable Full-Scale Input Range
  • FLEXIBLE CLOCKING:
         Differential or Single-Ended
         Accepts Sine or Square Wave Clocking Down to 0.5VPP
         Variable Threshold Level
  • APPLICATIONS
    • COMMUNICATIONS RECEIVERS
    • TEST INSTRUMENTATION
    • CCD IMAGING

All trademarks are the property of their respective owners.

The ADS5422 is a high-dynamic range, 14-bit, 62MSPS, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives good spurious performance up to the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.

The ADS5422 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.

The ADS5422 is available in an LQFP-64 package.

The ADS5422 is a high-dynamic range, 14-bit, 62MSPS, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives good spurious performance up to the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.

The ADS5422 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.

The ADS5422 is available in an LQFP-64 package.

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Technical documentation

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Type Title Date
* Data sheet 14-Bit, 62MSPS Sampling Analog-To-Digital Converter datasheet (Rev. D) 22 Jun 2005
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note High-Speed, Analog-to-Digital Converter Basics 11 Jan 2012
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
EVM User's guide ADS5421/22EVM 30 Jan 2003

Design & development

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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

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Calculation tool

ADC-HARMONIC-CALC — Analog-to-digital converter (ADC) harmonic calculator

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

Calculation tool

JITTER-SNR-CALC — Jitter and SNR Calculator for ADCs

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
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