Quad-channel general-purpose 600-MHz to 6-GHz RF transceiver


Product details


# of TX/RX 4T4R2F # of DUCs/TX 1 # of DDCs/RX 1 Data rate (MSPS) 737 Operating temperature range (C) -40 to 85 Applications General Purpose open-in-new Find other RF-sampling transceivers

Package | Pins | Size

FCBGA (ABJ) 400 FCBGA (ABJ) 400 289 mm² 17 x 17 FCBGA (ALK) 400 289 mm² 17 x 17 open-in-new Find other RF-sampling transceivers


  • Quad transmitters based on direct up-conversion architecture:
    • Up to 600 MHz of RF transmitted bandwidth per chain
  • Quad receivers based on 0-IF down-conversion architecture:
    • Up to 200 MHz of RF received bandwidth per chain
  • Feedback chain based on RF sampling ADC:
    • Up to 600 MHz of RF received bandwidth
  • RF frequency range: 600 MHz to 6 GHz
  • Four wideband fractional-N PLL, VCO for TX and RX LO
  • Dedicated integer-N PLL, VCO for data converters clock generation
  • JESD204B and JESD204C SerDes interface support:
    • 8 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 16-bit, 12-bit, 24-bit and 32-bit formatting
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
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The AFE7700 device is a high-performance, multichannel transceiver, integrating four direct up-conversion transmitter chains, four direct down-conversion receiver chains, and two wideband RF sampling digitizing auxiliary chains (feedback paths). The high dynamic range of the transmitter and receiver chains enables high performance wireless transceiver systems.

The low power dissipation and large channel integration of the AFE7700 allows the device to address the power and size constraints of multi-antenna and phased array systems. The wideband and high dynamic range feedback path can assist the Digital Pre-Distortion (DPD) of power amplifiers and IQ correction in the transmitter chain. The fast SerDes speed can reduce the number of lanes required to transfer the data in and out.

Each receiver chain of the AFE7700 includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated programmable antialiasing low pass filters, driving a continuous-time sigma-delta ADC. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz. Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.

Each transmitter chain includes two 14-bit, 3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.

Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCO that allows a fast switching between two observed RF input bands.

The synthesizer section integrates four fractional-N RF PLL that can generate four different RF LO, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers and one feedback paths.


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For commercial-wireless applications, see our wireless-infrastructure AFEs.

Technical documentation

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Type Title Date
* Data sheet AFE7700 Quad-Channel General Purpose RF Transceiver datasheet (Rev. A) Feb. 20, 2020
Certificate AFE7700EVM EU Declaration of Conformity (DoC) Aug. 27, 2020
Technical article So, what's a VNA anyway? Aug. 23, 2019
Technical article So, what's the deal with frequency response? Aug. 23, 2019
Technical article So, what are S-parameters anyway? May 23, 2019
Technical article How to achieve fast frequency hopping Mar. 03, 2019

Design & development

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Hardware development


The AFE7700 evaluation module (EVM) is a board used to evaluate the AFE7700 integrated RF transceiver. AFE7700 supports up to four-transmit, four-receive, and two feedback channels (4T4R2F) and integrates phase-locked loops (PLLs) and voltage-controlled oscillators (VCOs) for generation of (...)

  • Evaluates AFE7700 integrated transceiver
  • Simplified digital interface with JESD204B/C; supports up to 29.5-Gbps lane rates
  • JESD subclass 1 for multiple-device synchronization
  • Onboard clocking solution with optional external feed
  • Onboard power-management scheme

Software development

JESD204 Rapid Design IP for FPGAs connected to TI high-speed data converters
TI-JESD204-IP The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
  • Compatible with JEDEC JESD204a/b/c protocols
  • Supports subclass 1 deterministic latency and multidevice synchronization
  • Supported lane rates
    • Up to 16.375 Gbps in 8b/10b mode
    • Up to 20 Gbps in 64b/66b mode
  • Supports all protocol related error detection and reporting features
  • Integrated transport layer (...)

CAD/CAE symbols

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FCBGA (ABJ) 400 View options
FCBGA (ALK) 400 View options

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