CD4055B and CD4056B types are single-digit BCD-to-7-segment decoder/driver circuits that provide level-shifting functions on the chip. This feature permits the BCD input-signal swings (VDD to VSS) to be the same as or different from the 7-segment output-signal swings (VDD to VEE). For example, the BCD input-signal (VDD to VSS) may be as small as 0 to -3 V, whereas the output-display drive-signal swing (VDD to VEE) may be as large as from 0 to -15 V. If VDD to VEE exceeds 15 V, VDD to VSS should be at least 4V (0 to -4V). The 7-segment outputs are controlled by the DISPLAY-FREQUENCY (DF) input which causes the selected segment outputs to be low, high, or a square-wave output (for liquid-crystal displays). When the DF input is low the output segments will be high when selected by the BCD inputs. When the DF input is high, the output segments will be low when selected by the BCD inputs. When a square-wave is present at the DF input, the selected segments will have a square-wave output that is 180° out of phase with the DF input. Those segments which are not selected will have a square-wave output that is in phase with the input. DF square-wave repetition rates for liquid-crystal displays usually range form 30 Hz (well above flicker rate) to 200 Hz (well below the upper limit of the liquid-crystal frequency response). The CD4055B provides a level-shifted high-amplitude DF output which is required for driving the common electrode in liquid-crystal displays. The CD4056B provides a strobed-latch function at the BCD inputs. Decoding of all input combinations on the CD4055B and CD4056B provides displays of 0 to 9 as well as L, P, H, A, -, and a blank position.
The CD4054B provides level shifting similar to the CD4055B and CD4056B independently strobed latches, and common DF control on 4 signal lines. The CD4054B is intended to provide drive-signal compatibility with the CD4055B and CD4056B 7-segment decoder types for the decimal point, colon, polarity, and similar display lines. A level-shifted high-amplitude DF output can be obtained from any CD4054B output line by connecting the corresponding input and strobe lines to a low and high level, respectively and applying a square wave to DFIN. The CD4054B may also be utilized for logic-level "up conversion" or "down conversion". For example, input-signal swings (VDD to VSS) for +5 to 0 V can be converted to output-signal swings (VDD to VEE) of +5 to -5 V. The level-shifted function on all three types permits the use of different input- and output-signal swings. The input swings from a low level of VSS to a high level of VDD while the output swings from a low level of VEE to the same high level of VDD. Thus, the input and output swings can be selected independently of each other over a 3-to 18 V range. VSS may be connected to VEE when no level-shift function is required.
For the CD4054B and CD4056B, data are transferred from input to output by placing a high voltage level at the strobe input. A low voltage at the strobe input latches the data input and the corresponding output segments remain selected (or non-selected) while the strobe is low.
Whenever the level-shifing function is required, the CD4055B can be used by itself to drive a liquid-crystal display (Fig.16 and Fig.20). The CD4056B, however, must be used together with a CD4054B to provide the common DF output (Fig.19). The capability of extending the voltage swing on the negative end (this voltage cannot be extended on the positive end) can be used to advantage in the setup of Fig.18. Fig.17 is common to all three types.
The CD4054B-, CD4055B-, and CD4056B-series types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). The CD4054B- and CD4056B-series types also are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix).
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
|8||0.3||1150||4:7||Standard||0.67||-0.35||Catalog||-55 to 125||
PDIP | 16
SOIC | 16
TSSOP | 16
16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)
16TSSOP: 22 mm2: 4.4 x 5 (TSSOP | 16)