The HC138, HC238, HCT138, and HCT238 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. Both circuits have three binary select inputs (A0, A1 and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC/HCT138 series will go low or which of the normally low outputs of the HC/HCT238 series will go high.
Two active low and one active high enables (E1\, E2\, and E3) are provided to ease the cascading of decoders. The decoders 8 outputs can drive 10 low power Schottky TTL equivalent loads.
Data sheet acquired from Harris Semiconductor
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
||Decoder/Demultiplexer||HCT||4.5||5.5||1||5||25||0.08||35||3:8||Standard||4/-4||Military||-55 to 125||CDIP | 16||See datasheet (CDIP)||8||5||0.75||2|
|HCT||4.5||5.5||1||5||25||0.08||35||3:8||Standard||4||-4||Catalog||-55 to 125||
PDIP | 16
SOIC | 16
See datasheet (PDIP)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)