Product details

Technology family ACT Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -55 to 125 Rating Catalog
Technology family ACT Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
  • ’AC257, ’ACT257. . . . . . . . . . . . . Non-Inverting Outputs
  • CD74ACT258 . . . . . . . . . . . . . . . . . . . Inverting Outputs
  • Buffered Inputs
  • Typical Propagation Delay
    - 4.4ns at VCC = 5V, TA = 25°C, CL = 50pF
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
  • ±24mA Output Drive Current
    - Fanout to 15 FAST™ ICs
    Drives 50 Transmission Lines
  • Characterized for operation from –40° to 85°C

FAST™ is a Trademark of Fairchild Semiconductor.

  • ’AC257, ’ACT257. . . . . . . . . . . . . Non-Inverting Outputs
  • CD74ACT258 . . . . . . . . . . . . . . . . . . . Inverting Outputs
  • Buffered Inputs
  • Typical Propagation Delay
    - 4.4ns at VCC = 5V, TA = 25°C, CL = 50pF
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
  • ±24mA Output Drive Current
    - Fanout to 15 FAST™ ICs
    Drives 50 Transmission Lines
  • Characterized for operation from –40° to 85°C

FAST™ is a Trademark of Fairchild Semiconductor.

The ’AC257, ’ACT257 and CD74ACT258 are quad 2-input multiplexers with three-state outputs that utilize Advanced CMOS Logic technology. Each of these devices selects four bits of data from two sources under the control of a common Select input (S). The Output Enable (OE\) is active LOW. When OE\ is HIGH, all of the outputs (Y or Y\) are in the high-impedance state regardless of all other input conditions.

Moving data from two groups of registers to four common output buses is a common use of the ’AC257, ’ACT257, and CD74ACT258. The state of the Select input determines the particular register from which the data comes. The ’AC257, ’ACT257 and CD74ACT258 can also be used as function generators.

The ’AC257, ’ACT257 and CD74ACT258 are quad 2-input multiplexers with three-state outputs that utilize Advanced CMOS Logic technology. Each of these devices selects four bits of data from two sources under the control of a common Select input (S). The Output Enable (OE\) is active LOW. When OE\ is HIGH, all of the outputs (Y or Y\) are in the high-impedance state regardless of all other input conditions.

Moving data from two groups of registers to four common output buses is a common use of the ’AC257, ’ACT257, and CD74ACT258. The state of the Select input determines the particular register from which the data comes. The ’AC257, ’ACT257 and CD74ACT258 can also be used as function generators.

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Technical documentation

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Type Title Date
* Data sheet Quad 2-Input Multiplexer with Three-State Outputs datasheet (Rev. A) 17 May 2000
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian

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