The HC251 and HCT251 are 8-channel digital multiplexers with three-state outputs, fabricated with high-speed silicon-gate CMOS technology. Together with the low power consumption of standard CMOS integrated circuits, they possess the ability to drive 10 LSTTL loads. The three-state feature makes them ideally suited for interfacing with bus lines in a bus-oriented system.
This multiplexer features both true (Y) and complement (Y\) outputs as well as an output enable (OE\) input. The OE\ must be at a low logic level to enable this device. When the OE\ input is high, both outputs are in the high-impedance state. When enabled, address information on the data select inputs determines which data input is routed to the Y and Y\ outputs. The HCT251 logic family is speed, function, and pin-compatible with the standard LS251.
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
|28||0.08||21||8:1||3-State Output||5.2||-5.2||Catalog||-55 to 125||
PDIP | 16
SOIC | 16
16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)
|CD54HC251||Samples not available||Encoder/Multiplexer||HC||2||6||1||
|28||0.08||21||8:1||3-State Output||5.2/-5.2||Military||-55 to 125||CDIP | 16||16CDIP: 135 mm2: 6.92 x 19.56 (CDIP | 16)||2||5||0.75||2|