The CY74FCT257T has four identical two-input multiplexers that select four bits of data from two sources under the control of a common data-select (S) input. The I0 inputs are selected when S is low, and the I1 inputs are selected when S is high. Data at the output is noninverted.
The CY74FCT257T is a logic implementation of a four-pole, two-position switch, where the position of the switch is determined by the logic levels at S. Outputs are in the high-impedance state when the output-enable (OE\) input is high.
All but one device must be in the high-impedance state to avoid currents exceeding the maximum ratings if outputs are tied together. OE\ inputs must ensure that there is no overlap when outputs of 3-state devices are tied together.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
|FCT||4.75||5.25||4||5||70||0.2||7||2:1||3-State Output||64||-32||Catalog||-40 to 85||
SOIC | 16
SOIC | 16
SSOP | 16
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)
16SOIC: 77 mm2: 7.5 x 10.3 (SOIC | 16)
16SSOP: 29 mm2: 6 x 4.9 (SSOP | 16)