Product details

Type Redriver Number of channels (#) 8 Input compatibility CML Speed (Max) (Gbps) 28.125 Protocols IEEE802.3bj, 100GbE, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, 100G-CR, QSFP28, CFP2/CFP4, CDFP Operating temperature range (C) -40 to 85
Type Redriver Number of channels (#) 8 Input compatibility CML Speed (Max) (Gbps) 28.125 Protocols IEEE802.3bj, 100GbE, Infiniband EDR, OIF-CEi-25G-LR/MR/SR/VSR/CR, 100G-CR, QSFP28, CFP2/CFP4, CDFP Operating temperature range (C) -40 to 85
NFBGA (ZBL) 135 104 mm² 13 x 8
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28 Gbps Interfaces
  • Low Power Consumption: 93 mW / Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of Link Training, Auto-Negotiation, and FEC Pass-Through
  • Extends Channel Reach by 17 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range
  • Octal-Channel Multi-Protocol Linear Equalizer Supporting up to 28 Gbps Interfaces
  • Low Power Consumption: 93 mW / Channel (Typical)
  • No Heat Sink Required
  • Linear Equalization for Seamless Support of Link Training, Auto-Negotiation, and FEC Pass-Through
  • Extends Channel Reach by 17 dB+ Beyond Normal ASIC-to-ASIC Capability
  • Ultra-Low Latency: 100 ps (Typical)
  • Low Additive Random Jitter
  • Small 8-mm x 13-mm BGA Package with Integrated RX AC Coupling Capacitors for Easy Flow-Through Routing
  • Unique Pinout Allows Routing High-Speed Signals Underneath the Package
  • Pin-Compatible Retimer Available
  • Single 2.5-V ±5% Power Supply
  • –40°C to +85°C Operating Temperature Range

The DS280BR820 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for backplane, front-port, and chip-to-chip applications.

The linear nature of the DS280BR820’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR820 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR820’s small package dimensions, optimized high-speed signal escape, and the pin-compatible Retimer portfolio make the DS280BR820 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP, SFP, CFP2, CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX side) eliminate the need for external capacitors on the PCB. The DS280BR820 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible Retimer device is available for longer reach applications.

The DS280BR820 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

The DS280BR820 is an extremely low-power, high-performance eight-channel linear equalizer supporting multi-rate, multi-protocol interfaces up to 28 Gbps. It is used to extend the reach and improve the robustness of high-speed serial links for backplane, front-port, and chip-to-chip applications.

The linear nature of the DS280BR820’s equalization preserves the transmit signal characteristics, thereby allowing the host and link partner ASICs to freely negotiate transmit equalizer coefficients (100G-CR4/KR4). This transparency to the link training protocol facilitates system-level interoperability with minimal effect on the latency. Each channel operates independently, which allows the DS280BR820 to support individual lane Forward Error Correction (FEC) pass-through.

The DS280BR820’s small package dimensions, optimized high-speed signal escape, and the pin-compatible Retimer portfolio make the DS280BR820 ideal for high-density backplane applications. Simplified equalization control, low power consumption, and ultra-low additive jitter make it suitable for front-port interfaces such as 100G-SR4/LR4/CR4. The small 8-mm x 13-mm footprint easily fits behind numerous standard front-port connectors like QSFP, SFP, CFP2, CFP4, and CDFP without the need for a heat sink.

Integrated AC coupling capacitors (RX side) eliminate the need for external capacitors on the PCB. The DS280BR820 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and bill of materials (BOM) cost.

A pin-compatible Retimer device is available for longer reach applications.

The DS280BR820 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM.

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Special note

To request IBIS AMI models, and device GUI profile: Request DS280BR820

Technical documentation

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Type Title Date
* Data sheet DS280BR820 Low Power 28 Gbps 8 Channel Linear Repeater datasheet (Rev. B) PDF | HTML 03 Oct 2019
Application note Optimal Implementation of 25G-28G Ethernet Retimers versus Redrivers (Rev. A) 07 Jan 2020
EVM User's guide DS280BR810EVM User's Guide (Rev. B) 03 Sep 2019
More literature Advanced Signal Conditioning Made Easy and Efficient 12 Jan 2017
Application note Understanding EEPROM Programming for 25G and 28G Repeaters and Retimers 13 Jan 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DS280BR820EVM

DS280BR820 28 Gbps 8-channel linear repeater evaluation module

The DS280BR820EVM allows for easy evaluation of the DS280BR820 28 Gbps  8-channel linear repeater. To use this EVM, supply power (2.5V or 3.3V) via standard banana connectors and high-speed traffic via Huber+Suhner 1x8 MXP connectors. Huber+Suhner cable assemblies are not included.

Through the (...)

User guide: PDF
Not available on TI.com
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Reference designs

TIDA-00427 — 2-port 100GbE/40GbE/10GbE QSFP28 Signal Conditioner Reference Design

This verified reference design is a signal conditioning solution for front-port QSFP28 supporting two 100GbE ports compatible with 100G-CR4/SR4/LR4, 40G-CR4/SR4/LR4 and 10G SFF-8431 requirements. The design is applicable to optical and passive/active copper cables. It allows for reach extension (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
NFBGA (ZBL) 135 View options

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