DS90LV004

ACTIVE

4-channel LVDS buffer/repeater with pre-emphasis

Product details

Function Buffer Protocols CML, LVDS, LVPECL Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols CML, LVDS, LVPECL Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TQFP (PFB) 48 81 mm² (9 mm × 9 mm)
  • 1.5 Gbps data rate per channel
  • Configurable pre-emphasis drives lossy backplanes and cables
  • Low output skew and jitter
  • LVDS/CML/LVPECL compatible input, LVDS output
  • On-chip 100Ω input and output termination
  • 12 kV ESD protection on LVDS outputs
  • Single 3.3V supply
  • Very low power consumption
  • Industrial -40 to +85°C temperature range
  • Small TQFP Package Footprint
  • Evaluation Kit Available
  • See SCAN90004 for JTAG-enabled version

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments.

  • 1.5 Gbps data rate per channel
  • Configurable pre-emphasis drives lossy backplanes and cables
  • Low output skew and jitter
  • LVDS/CML/LVPECL compatible input, LVDS output
  • On-chip 100Ω input and output termination
  • 12 kV ESD protection on LVDS outputs
  • Single 3.3V supply
  • Very low power consumption
  • Industrial -40 to +85°C temperature range
  • Small TQFP Package Footprint
  • Evaluation Kit Available
  • See SCAN90004 for JTAG-enabled version

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments.

The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.

The DS90LV004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet DS90LV004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis datasheet (Rev. P) Apr 17, 2013
Application note Signaling Rate vs. Distance for Differential Buffers Jan 26, 2010
White paper Overcoming Impedance Discontins in HS Signal Paths Using LVDS Sgnl Cnditionrs May 1, 2006
Application note LVDS Signal Quality: Jitter Measurements Using Eye Patterns Test Report #1 Oct 5, 1998

Design & development

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Simulation model

DS90LV004 IBIS Model

SNLM046.ZIP (11 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TQFP (PFB) 48 Ultra Librarian

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