FPD-Link III Deserializer with Bidirectional Control Channel

DS90UB928Q-Q1

ACTIVE

Product details

Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (Max) (MHz) 85 Output compatibility LVDS Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Operating temperature range (C) -40 to 105
Function Deserializer Color depth (bpp) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (Max) (MHz) 85 Output compatibility LVDS Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Operating temperature range (C) -40 to 105
WQFN (RHS) 48 49 mm² 7 x 7
  • Qualified for Automotive Applications AEC-Q100
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level ±8 kV
    • Device CDM ESD Classification Level C6
  • Bidirectional Control Channel Interface with I2C Compatible Serial Control Bus
  • Low EMI FPD-Link Video Output
  • Supports High Definition (720p) Digital Video
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 MHz to 85 MHz Pixel Clock Support
  • Up to 4 I2S Digital Audio Outputs for Surround Sound Applications
  • 4 Bidirectional GPIO Channels with 2 Dedicated Pins
  • Single 3.3 V supply with 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
  • AC-Coupled STP Interconnect Up to 10 Meters
  • DC-Balanced and Scrambled Data with Embedded Clock
  • Adaptive Cable Equalization
  • Image Enhancement (White Balance & Dithering) and Internal Pattern Generation
  • Backward Compatible Modes
  • Qualified for Automotive Applications AEC-Q100
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level ±8 kV
    • Device CDM ESD Classification Level C6
  • Bidirectional Control Channel Interface with I2C Compatible Serial Control Bus
  • Low EMI FPD-Link Video Output
  • Supports High Definition (720p) Digital Video
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 MHz to 85 MHz Pixel Clock Support
  • Up to 4 I2S Digital Audio Outputs for Surround Sound Applications
  • 4 Bidirectional GPIO Channels with 2 Dedicated Pins
  • Single 3.3 V supply with 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
  • AC-Coupled STP Interconnect Up to 10 Meters
  • DC-Balanced and Scrambled Data with Embedded Clock
  • Adaptive Cable Equalization
  • Image Enhancement (White Balance & Dithering) and Internal Pattern Generation
  • Backward Compatible Modes

The DS90UB928Q-Q1 deserializer, in conjunction with a DS90UB925Q-Q1 or DS90UB927Q-Q1 serializer, provides a solution for distribution of digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI (FPD-Link)), and I2S audio data. The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.

The DS90UB928Q-Q1 deserializer, in conjunction with a DS90UB925Q-Q1 or DS90UB927Q-Q1 serializer, provides a solution for distribution of digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI (FPD-Link)), and I2S audio data. The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.

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Technical documentation

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Type Title Date
* Data sheet DS90UB928Q-Q1 5 MHz to 85 MHz 24-bit Color FPD-Link III to FPD-Link Deserializer With Bidirectional Control Channel datasheet (Rev. C) 26 Jul 2016
Application note Exploring the Int Test Pattern Generation Feature of FPD-Link III IVI Devices (Rev. G) 03 Nov 2020
Technical article How to choose a power supply for an automotive camera module 17 Sep 2020
Application note Using the I2S Audio Interface of DS90Ux92x FPD-Link III Devices 04 May 2013
Application note I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) 26 Apr 2013

Design & development

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Evaluation board

DS90UB928QEVM — DS90UB928QEVM FPD-Link III Deserializer Evaluation Module

The Texas Instruments DS90UB928QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UB928Q 5MHz-85MHz FPD-Link III Deserializer (DES). The device translates a high-speed serialized FPD-Link III interface transported over a single shielded twisted pair (...)
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DS90UB928Q IBIS Model (Rev. B)

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