DS90UH928Q-Q1

ACTIVE

Product details

Function Deserializer Color depth (bps) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (max) (MHz) 85 Output compatibility FPD-Link Features HDCP Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Function Deserializer Color depth (bps) 24 Input compatibility FPD-Link III LVDS Pixel clock frequency (max) (MHz) 85 Output compatibility FPD-Link Features HDCP Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RHS) 48 49 mm² 7 x 7
  • Qualified for Automotive Applications AEC-Q100
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level ±8 kV
    • Device CDM ESD Classification Level C6
  • Integrated HDCP Cipher Engine with On-Chip Key Storage
  • Supports HDCP Repeater Application
  • Bidirectional Control Channel Interface with I2C Compatible Serial Control Bus
  • Low EMI FPD-Link Video Output
  • Supports High Definition (720p) Digital Video
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 MHz to 85 MHz Pixel Clock Support
  • Up to 4 I2S Digital Audio Outputs for Surround Sound Applications
  • 4 Bidirectional GPIO Channels with 2 Dedicated Pins
  • Single 3.3 V supply with 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
  • AC-Coupled STP Interconnect Up to 10 Meters
  • DC-Balanced and Scrambled Data with Embedded Clock
  • Adaptive Cable Equalization
  • Image Enhancement (White Balance & Dithering) and Internal Pattern Generation
  • Backward Compatible Modes
  • Qualified for Automotive Applications AEC-Q100
    • Device Temperature Grade 2: –40°C to +105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level ±8 kV
    • Device CDM ESD Classification Level C6
  • Integrated HDCP Cipher Engine with On-Chip Key Storage
  • Supports HDCP Repeater Application
  • Bidirectional Control Channel Interface with I2C Compatible Serial Control Bus
  • Low EMI FPD-Link Video Output
  • Supports High Definition (720p) Digital Video
  • RGB888 + VS, HS, DE and I2S Audio Supported
  • 5 MHz to 85 MHz Pixel Clock Support
  • Up to 4 I2S Digital Audio Outputs for Surround Sound Applications
  • 4 Bidirectional GPIO Channels with 2 Dedicated Pins
  • Single 3.3 V supply with 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
  • AC-Coupled STP Interconnect Up to 10 Meters
  • DC-Balanced and Scrambled Data with Embedded Clock
  • Adaptive Cable Equalization
  • Image Enhancement (White Balance & Dithering) and Internal Pattern Generation
  • Backward Compatible Modes

The DS90UH928Q-Q1 deserializer, in conjunction with a DS90UH925Q-Q1 or DS90UH927Q-Q1 serializer, provides a solution for secure distribution of content-protected digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI (FPD-Link)), and I2S audio data. The digital video and audio data is protected using the industry standard HDCP copy protection scheme.The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.

The HDCP cipher engine is implemented in both the serializer and deserializer. HDCP keys are stored in on-chip memory.

The DS90UH928Q-Q1 deserializer, in conjunction with a DS90UH925Q-Q1 or DS90UH927Q-Q1 serializer, provides a solution for secure distribution of content-protected digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI (FPD-Link)), and I2S audio data. The digital video and audio data is protected using the industry standard HDCP copy protection scheme.The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.

Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.

The HDCP cipher engine is implemented in both the serializer and deserializer. HDCP keys are stored in on-chip memory.

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Technical documentation

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* Data sheet DS90UH928Q-Q1 5 MHz to 85 MHz 24-bit Color FPD-Link III to FPD-Link Deserializer With HDCP datasheet (Rev. C) PDF | HTML 16 May 2016
Technical article How to choose a power supply for an automotive camera module 17 Sep 2020

Design & development

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Evaluation board

DS90UB928QEVM — DS90UB928QEVM FPD-Link III Deserializer Evaluation Module

The Texas Instruments DS90UB928QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UB928Q 5MHz-85MHz FPD-Link III Deserializer (DES). The device translates a high-speed serialized FPD-Link III interface transported over a single shielded twisted (...)
User guide: PDF
Not available on TI.com
Evaluation board

DS90UH928QEVM — DS90UH928QEVM FPD-Link III Deserializer Evaluation Module

The Texas Instruments DS90UH928QEVM evaluation module (EVM) helps system designers evaluate the operation and performance of the DS90UH928Q 5MHz-85MHz FPD-Link III Deserializer (DES). The device translates a high-speed serialized FPD-Link III interface transported over a single shielded twisted (...)

User guide: PDF
Simulation model

DS90UH928Q IBIS Model (Rev. B)

SNLM145B.ZIP (93 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins Download
WQFN (RHS) 48 View options

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