123dB SNR Stereo DAC (H/W Control)
Product details
Parameters
Package | Pins | Size
Features
- 24-Bit Resolution
- Analog Performance:
- Dynamic Range: 123 dB
- THD+N: 0.0005%
- Differential Current Output: 4 mAp-p
- 8× Oversampling Digital Filter:
- Stop-Band Attenuation: –98 dB
- Pass-Band Ripple: ±0.0002 dB
- Sampling Frequency: 10 kHz to 200 kHz
- System Clock: 128, 192, 256, 384, 512, or 768 fS
With Autodetect - Accepts 16- and 24-Bit Audio Data
- PCM Data Formats: Standard, I2S, and Left-
Justified - Interface Available for Optional External Digital
Filter or DSP - Digital De-Emphasis
- Digital Filter Rolloff: Sharp or Slow
- Soft Mute
- Zero Flag
- Dual-Supply Operation: 5-V Analog, 3.3-V Digital
- 5-V Tolerant Digital Inputs
- Small 28-Lead SSOP Package
- Pin Assignment Compatible With PCM1794
Description
The PCM1798 device is a monolithic CMOS integrated circuit that includes stereo digital-to-analog converters (DACs) and support circuitry in a small 28-lead SSOP package. The data converters use TIs advanced segment DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter. The PCM1798 device provides balanced current outputs, allowing the user to optimize analog performance externally. Sampling rates up to 200 kHz are supported.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | PCM1798 24-Bit, 192-kHz Sampling, Advanced Segment, Audio Stereo Digital-to-Analog Converter datasheet (Rev. B) | Mar. 13, 2015 |
Application note | Dynamic Performance Testing of Digital Audio D/A Converters | Oct. 02, 2000 | |
Application note | A Low Noise, Low Distortion Design for Antialiasing and Anti-Imaging Filters | Sep. 27, 2000 | |
Application note | THD+N Versus Frequency Characteristics and Spectra of the PCM1717/18/19/20/23/27 | Sep. 27, 2000 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SSOP (DB) | 28 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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