These data selectors/multiplexers contain inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two 4-line sections.
The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at a high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable () input. The output is disabled when is high.
The SN54ALS253 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS253 and SN74AS253A are characterized for operation from 0°C to 70°C.
Select inputs A and B are common to both sections.
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
||Encoder/Multiplexer||ALS||4.5||5.5||2||5||75||14||21||4:1||3-State Output||24/-2.6||Military||-55 to 125||
CDIP | 16
LCCC | 20
16CDIP: 135 mm2: 6.92 x 19.56 (CDIP | 16)
20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20)
|SN74ALS253||Samples not available||
|ALS||4.5||5.5||2||5||75||14||21||4:1||3-State Output||24||-2.6||Catalog||0 to 70||
PDIP | 16
SOIC | 16
16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)