SN65LVDS179

ACTIVE

Single full-duplex LVDS transceiver

Product details

Function Transceiver Protocols LVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 150, 400 Input signal LVDS, LVTTL Output signal LVDS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols LVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 150, 400 Input signal LVDS, LVTTL Output signal LVDS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) VSSOP (DGK) 8 14.7 mm² (3 mm × 4.9 mm)
  • Meets or Exceeds the Requirements of ANSI
    TIA/EIA-644-1995 Standard
  • Full-Duplex Signaling Rates up to 150 Mbps
  • Bus-Pin ESD Exceeds 12 kV
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltages of 350 mV and a 100-Ω Load
  • Propagation Delay Times
    • Driver: 1.7 ns Typical
    • Receiver: 3.7 ns Typical
  • Power Dissipation at 200 MHz
    • Driver: 25 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5-V Tolerant
  • Receiver Maintains High Input Impedance With
    VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe
  • Meets or Exceeds the Requirements of ANSI
    TIA/EIA-644-1995 Standard
  • Full-Duplex Signaling Rates up to 150 Mbps
  • Bus-Pin ESD Exceeds 12 kV
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltages of 350 mV and a 100-Ω Load
  • Propagation Delay Times
    • Driver: 1.7 ns Typical
    • Receiver: 3.7 ns Typical
  • Power Dissipation at 200 MHz
    • Driver: 25 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5-V Tolerant
  • Receiver Maintains High Input Impedance With
    VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe

The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 devices are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.

These devices offer various driver, receiver, and enabling combinations in industry-standard footprints. Because these devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device. For these functions with a high-impedance driver output, see the SN65LVDM series of devices. All devices are characterized for operation from –40°C to 85°C.

The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 devices are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.

These devices offer various driver, receiver, and enabling combinations in industry-standard footprints. Because these devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device. For these functions with a high-impedance driver output, see the SN65LVDM series of devices. All devices are characterized for operation from –40°C to 85°C.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN65LVDSxxx High-Speed Differential Line Drivers and Receivers datasheet (Rev. R) PDF | HTML Jan 22, 2016
Application brief LVDS to Improve EMC in Motor Drives Sep 27, 2018
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? Aug 3, 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling May 16, 2018

Design & development

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Simulation model

SN65LVDS179 IBIS Model Version 2.1 (Rev. A)

SLLM005 (46 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

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