These monolithic BCD-to-decimal decoder/drivers consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input date available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that all outputs remain off for all invalid binary input conditions. These decoders feature high-performance,
n-p-n output transistors designed for use as indicator/relay drivers or as open-collector logic-circuit drivers. Each of the high-breakdown output transistors (15 volts) of the SN54145, SN74145, or SN74LS145 will sink up to 80 milliamperes of current. Each input is one Series 54/74 or Series 54LS/74LS standard load, respectively. Inputs and outputs are entirely compatible for use with TTL or DTL logic curciuts, and the outputs are compatible for interfacing with most MOS integrated circuits. Power dissipation is typically 215 milliwatts for the '145 and 35 milliwatts for the 'LS145.
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
|TTL||4.75||5.25||1||5||75||70||50||4:10||Standard||80||-20||Catalog||0 to 70||PDIP | 16||16PDIP: 181 mm2: 9.4 x 19.3 (PDIP | 16)||10||5||0.75||2|
|SN54145||Samples not available||Decoder/Demultiplexer||TTL||4.5||5.5||1||5||75||70||50||4:10||Standard||80/-20||Military||-55 to 125||CDIP | 16||16CDIP: 135 mm2: 6.92 x 19.56 (CDIP | 16)||10||5||0.75||2|