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SN74AS258

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Quadruple 2-Line to 1-Line Data Selectors/Multiplexers With 3-State Outputs

Data sheet
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Quadruple 2-Line to 1-Line Data Selectors/Multiplexers With 3-State Outputs

SN74AS258

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Product details

Parameters

Technology Family AS Function Digital Multiplexer Configuration 2:1 Number of channels (#) 4 Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type Bipolar Output type 3-State Data rate (Max) (Mbps) 250 ICC (Max) (uA) 25200 Features High speed (tpd 10-50ns) open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 open-in-new Find other Encoders & decoders

Features

  • 3-State Outputs Interface Directly With System Bus
  • Provide Bus Interface From Multiple Sources in High-Performance Systems
  • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
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Description

These data selectors/multiplexers are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable () input is at a high logic level.

The SN54ALS257A and SN54ALS258A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS257A, SN74ALS258A, SN74AS257, and SN74AS258 are characterized for operation from 0°C to 70°C.

 

 

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Technical documentation

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Type Title Date
* Data sheet Quad 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputs datasheet (Rev. C) Aug. 01, 1996
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Advanced Schottky Load Management Feb. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note Advanced Schottky (ALS and AS) Logic Families Aug. 01, 1995

Design & development

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Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
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CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options

Ordering & quality

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